From 610134d8e3c74ed55e0287dcee3635a2c2cff93e Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 13 Dec 2021 12:31:58 +0000 Subject: [PATCH] rename msr_pr to priv_mode in LDSTCompUnit --- src/soc/experiment/compldst_multi.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/soc/experiment/compldst_multi.py b/src/soc/experiment/compldst_multi.py index 2baedc29..ddbd0804 100644 --- a/src/soc/experiment/compldst_multi.py +++ b/src/soc/experiment/compldst_multi.py @@ -103,6 +103,7 @@ from openpower.decoder.power_enums import MicrOp, Function, LDSTMode from soc.fu.ldst.ldst_input_record import CompLDSTOpSubset from openpower.decoder.power_decoder2 import Data from openpower.consts import MSR +from openpower.power_enums import MSRSpec from soc.config.test.test_loadstore import TestMemPspec # for debugging dcbz @@ -539,7 +540,7 @@ class LDSTCompUnit(RegSpecAPI, Elaboratable): comb += self.exc_o.eq(pi.exc_o) # exception occurred comb += addr_ok.eq(self.pi.addr_ok_o) # no exc, address fine # connect MSR.PR for priv/virt operation - comb += pi.msr_pr.eq(oper_r.msr[MSR.PR]) + comb += pi.priv_mode.eq(oper_r.msr[MSR.PR]) comb += Display("LDSTCompUnit: oper_r.msr %x pi.msr_pr=%x", oper_r.msr, oper_r.msr[MSR.PR]) -- 2.30.2