From 61331c4897131c8dfba7d7e432972c2bf1a79308 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Tue, 21 Oct 2014 14:23:11 +0200 Subject: [PATCH] re PR tree-optimization/63563 (ICE: in vectorizable_store, at tree-vect-stmts.c:5106 with -mavx2) PR tree-optimization/63563 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Bail out if either dra or drb stmts are not normal loads/stores. * gcc.target/i386/pr63563.c: New test. From-SVN: r216507 --- gcc/ChangeLog | 6 ++++++ gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/i386/pr63563.c | 17 +++++++++++++++++ gcc/tree-vect-data-refs.c | 7 +++++-- 4 files changed, 33 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr63563.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 87a4102038d..98fc55232e7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2014-10-21 Jakub Jelinek + + PR tree-optimization/63563 + * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Bail out + if either dra or drb stmts are not normal loads/stores. + 2014-10-21 Ilya Tocar * config/i386/i386.c (expand_vec_perm_1): Fix diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 50ac637d5d6..979fe430f8f 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2014-10-21 Jakub Jelinek + + PR tree-optimization/63563 + * gcc.target/i386/pr63563.c: New test. + 2014-10-20 Richard Biener * gcc.dg/tree-ssa/slsr-19.c: Make robust against operand order changes. diff --git a/gcc/testsuite/gcc.target/i386/pr63563.c b/gcc/testsuite/gcc.target/i386/pr63563.c new file mode 100644 index 00000000000..ce3e4658e75 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr63563.c @@ -0,0 +1,17 @@ +/* PR tree-optimization/63563 */ +/* { dg-do compile } */ +/* { dg-options "-O3 -mavx2" } */ + +struct A { unsigned long a, b, c, d; } a[1024] = { { 0, 1, 2, 3 } }, b; + +void +foo (void) +{ + int i; + for (i = 0; i < 1024; i++) + { + a[i].a = a[i].b = a[i].c = b.c; + if (a[i].d) + a[i].d = b.d; + } +} diff --git a/gcc/tree-vect-data-refs.c b/gcc/tree-vect-data-refs.c index e4befc0c85b..0807b95099d 100644 --- a/gcc/tree-vect-data-refs.c +++ b/gcc/tree-vect-data-refs.c @@ -2551,11 +2551,14 @@ vect_analyze_data_ref_accesses (loop_vec_info loop_vinfo, bb_vec_info bb_vinfo) over them. The we can just skip ahead to the next DR here. */ /* Check that the data-refs have same first location (except init) - and they are both either store or load (not load and store). */ + and they are both either store or load (not load and store, + not masked loads or stores). */ if (DR_IS_READ (dra) != DR_IS_READ (drb) || !operand_equal_p (DR_BASE_ADDRESS (dra), DR_BASE_ADDRESS (drb), 0) - || !dr_equal_offsets_p (dra, drb)) + || !dr_equal_offsets_p (dra, drb) + || !gimple_assign_single_p (DR_STMT (dra)) + || !gimple_assign_single_p (DR_STMT (drb))) break; /* Check that the data-refs have the same constant size and step. */ -- 2.30.2