From 617fc3b4e4db2ee58e1965421f4104a7c7e9572a Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 25 Jun 2019 14:14:04 +0100 Subject: [PATCH] split out reg_table --- simple_v_extension/abridged_spec.mdwn | 17 +---------------- simple_v_extension/reg_table.mdwn | 18 ++++++++++++++++++ simple_v_extension/specification.mdwn | 9 +-------- 3 files changed, 20 insertions(+), 24 deletions(-) create mode 100644 simple_v_extension/reg_table.mdwn diff --git a/simple_v_extension/abridged_spec.mdwn b/simple_v_extension/abridged_spec.mdwn index b9707d335..65e0f373d 100644 --- a/simple_v_extension/abridged_spec.mdwn +++ b/simple_v_extension/abridged_spec.mdwn @@ -204,22 +204,7 @@ Fields: As the above table is a CAM (key-value store) it may be appropriate (faster, less gates, implementation-wise) to expand it as follows: - struct vectorised { - bool isvector:1; - int vew:2; - bool enabled:1; - int predidx:7; - } - - struct vectorised fp_vec[32], int_vec[32]; - - for (i = 0; i < len; i++) // from VBLOCK Format - tb = int_vec if CSRvec[i].type == 0 else fp_vec - idx = CSRvec[i].regkey // INT/FP src/dst reg in opcode - tb[idx].elwidth = CSRvec[i].elwidth - tb[idx].regidx = CSRvec[i].regidx // indirection - tb[idx].isvector = CSRvec[i].isvector // 0=scalar - tb[idx].enabled = true; +[[!inline raw="yes" pages="simple_v_extension/reg_table" ]] ## Predication Table diff --git a/simple_v_extension/reg_table.mdwn b/simple_v_extension/reg_table.mdwn new file mode 100644 index 000000000..b92917947 --- /dev/null +++ b/simple_v_extension/reg_table.mdwn @@ -0,0 +1,18 @@ + struct vectorised { + bool isvector:1; + int vew:2; + int predidx:7; + bool enabled:1; + } + + struct vectorised fp_vec[32], int_vec[32]; + + for (i = 0; i < len; i++) // from VBLOCK Format + tb = int_vec if CSRvec[i].type == 0 else fp_vec + idx = CSRvec[i].regkey // INT/FP src/dst reg in opcode + tb[idx].elwidth = CSRvec[i].elwidth + tb[idx].regidx = CSRvec[i].regidx // indirection + tb[idx].isvector = CSRvec[i].isvector // 0=scalar + tb[idx].enabled = true; + + diff --git a/simple_v_extension/specification.mdwn b/simple_v_extension/specification.mdwn index d59af335b..81e65796e 100644 --- a/simple_v_extension/specification.mdwn +++ b/simple_v_extension/specification.mdwn @@ -557,14 +557,7 @@ operand size is "over-ridden" in a polymorphic fashion: As the above table is a CAM (key-value store) it may be appropriate (faster, implementation-wise) to expand it as follows: - struct vectorised fp_vec[32], int_vec[32]; - - for (i = 0; i < len; i++) // from VBLOCK Format - tb = int_vec if CSRvec[i].type == 0 else fp_vec - idx = CSRvec[i].regkey // INT/FP src/dst reg in opcode - tb[idx].elwidth = CSRvec[i].elwidth - tb[idx].regidx = CSRvec[i].regidx // indirection - tb[idx].isvector = CSRvec[i].isvector // 0=scalar +[[!inline raw="yes" pages="simple_v_extension/reg_table" ]] ## Predication Table -- 2.30.2