From 6187503f95c56aa3fdbb645170095c409dad12ff Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Mon, 27 Feb 2012 13:55:27 +0100 Subject: [PATCH] r600g: initialize SX_SURFACE_SYNC MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Reviewed-by: Alex Deucher Reviewed-by: Christian König --- src/gallium/drivers/r600/evergreen_state.c | 4 ++++ src/gallium/drivers/r600/evergreend.h | 2 ++ src/gallium/drivers/r600/r600_state.c | 3 +++ src/gallium/drivers/r600/r600d.h | 2 ++ 4 files changed, 11 insertions(+) diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c index 53fe81dfa9a..603b5797396 100644 --- a/src/gallium/drivers/r600/evergreen_state.c +++ b/src/gallium/drivers/r600/evergreen_state.c @@ -1955,6 +1955,8 @@ static void cayman_init_atom_start_cs(struct r600_context *rctx) r600_store_context_reg(cb, R_028864_SQ_PGM_RESOURCES_2_VS, S_028864_SINGLE_ROUND(V_SQ_ROUND_TO_ZERO)); r600_store_context_reg(cb, R_0288A8_SQ_PGM_RESOURCES_FS, 0); + r600_store_context_reg(cb, R_028354_SX_SURFACE_SYNC, S_028354_SURFACE_SYNC_MASK(0xf)); + eg_store_loop_const(cb, R_03A200_SQ_LOOP_CONST_0, 0x01000FFF); eg_store_loop_const(cb, R_03A200_SQ_LOOP_CONST_0 + (32 * 4), 0x01000FFF); } @@ -2435,6 +2437,8 @@ void evergreen_init_atom_start_cs(struct r600_context *rctx) r600_store_context_reg(cb, R_028864_SQ_PGM_RESOURCES_2_VS, S_028864_SINGLE_ROUND(V_SQ_ROUND_TO_ZERO)); r600_store_context_reg(cb, R_0288A8_SQ_PGM_RESOURCES_FS, 0); + r600_store_context_reg(cb, R_028354_SX_SURFACE_SYNC, S_028354_SURFACE_SYNC_MASK(0xf)); + eg_store_loop_const(cb, R_03A200_SQ_LOOP_CONST_0, 0x01000FFF); eg_store_loop_const(cb, R_03A200_SQ_LOOP_CONST_0 + (32 * 4), 0x01000FFF); } diff --git a/src/gallium/drivers/r600/evergreend.h b/src/gallium/drivers/r600/evergreend.h index 39d3dd6d580..ec88095e705 100644 --- a/src/gallium/drivers/r600/evergreend.h +++ b/src/gallium/drivers/r600/evergreend.h @@ -1585,6 +1585,8 @@ #define R_028238_CB_TARGET_MASK 0x00028238 #define R_02823C_CB_SHADER_MASK 0x0002823C #define R_028350_SX_MISC 0x00028350 +#define R_028354_SX_SURFACE_SYNC 0x00028354 +#define S_028354_SURFACE_SYNC_MASK(x) (((x) & 0x1FF) << 0) #define R_028380_SQ_VTX_SEMANTIC_0 0x00028380 #define R_028384_SQ_VTX_SEMANTIC_1 0x00028384 #define R_028388_SQ_VTX_SEMANTIC_2 0x00028388 diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index 38a9830c35e..bdecf7f8f94 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -2140,6 +2140,9 @@ void r600_init_atom_start_cs(struct r600_context *rctx) r600_store_context_reg(cb, R_0288A4_SQ_PGM_RESOURCES_FS, 0); r600_store_context_reg(cb, R_0288DC_SQ_PGM_CF_OFFSET_FS, 0); + if (rctx->chip_class == R700) + r600_store_context_reg(cb, R_028354_SX_SURFACE_SYNC, S_028354_SURFACE_SYNC_MASK(0xf)); + r600_store_loop_const(cb, R_03E200_SQ_LOOP_CONST_0, 0x1000FFF); r600_store_loop_const(cb, R_03E200_SQ_LOOP_CONST_0 + (32 * 4), 0x1000FFF); } diff --git a/src/gallium/drivers/r600/r600d.h b/src/gallium/drivers/r600/r600d.h index ec56ad027c4..fcce60ba0f1 100644 --- a/src/gallium/drivers/r600/r600d.h +++ b/src/gallium/drivers/r600/r600d.h @@ -2740,6 +2740,8 @@ #define S_028350_MULTIPASS(x) (((x) & 0x1) << 0) #define G_028350_MULTIPASS(x) (((x) >> 0) & 0x1) #define C_028350_MULTIPASS 0xFFFFFFFE +#define R_028354_SX_SURFACE_SYNC 0x028354 +#define S_028354_SURFACE_SYNC_MASK(x) (((x) & 0x1FF) << 0) #define R_028380_SQ_VTX_SEMANTIC_0 0x028380 #define S_028380_SEMANTIC_ID(x) (((x) & 0xFF) << 0) #define G_028380_SEMANTIC_ID(x) (((x) >> 0) & 0xFF) -- 2.30.2