From 62508eae1109c173f091158dc59f59e77c44fba4 Mon Sep 17 00:00:00 2001 From: lkcl Date: Mon, 19 Sep 2022 23:29:19 +0100 Subject: [PATCH] --- openpower/sv/rfc/ls001.mdwn | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/openpower/sv/rfc/ls001.mdwn b/openpower/sv/rfc/ls001.mdwn index cf2e618bf..b694ee4f3 100644 --- a/openpower/sv/rfc/ls001.mdwn +++ b/openpower/sv/rfc/ls001.mdwn @@ -526,7 +526,8 @@ in Multi-Issue Micro-architectures. If combined with Vertical-First then much more complex operations may exploit REMAP Schedules, such as Complex Number FFTs, by using Scalar intermediary -temporary registers to compute results that have a Vector destination. +temporary registers to compute results that have a Vector source +or destination or both. Contrast this with a Standard Horizontal-First Vector ISA where the only way to perform Vectorised Complex Arithmetic would be to add Complex Vector Arithmetic operations. -- 2.30.2