From 62c0b02717b0ff5ab56366780ec46b44161b76c9 Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Sat, 4 May 2019 08:04:59 -0700 Subject: [PATCH] freedreno: move UBWC color offset to fd_resource_offset() Best to keep it encapsulated in the helper which returns layer/level offset (and actually use that helper everywhere) rather than spreading the logic around the code. Also add a helper to find UBWC offset, to complete the encapsulation. Signed-off-by: Rob Clark --- .../drivers/freedreno/a6xx/fd6_blitter.c | 10 ++++---- src/gallium/drivers/freedreno/a6xx/fd6_emit.c | 4 ++-- src/gallium/drivers/freedreno/a6xx/fd6_gmem.c | 24 ++++++++++++------- .../drivers/freedreno/a6xx/fd6_image.c | 4 ++-- .../drivers/freedreno/a6xx/fd6_texture.c | 1 + .../drivers/freedreno/a6xx/fd6_texture.h | 2 +- .../drivers/freedreno/freedreno_resource.h | 15 +++++++++++- 7 files changed, 42 insertions(+), 18 deletions(-) diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c index 4784025bd70..a830b646d7e 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c @@ -440,6 +440,8 @@ emit_blit_texture(struct fd_ringbuffer *ring, const struct pipe_blit_info *info) for (unsigned i = 0; i < info->dst.box.depth; i++) { unsigned soff = fd_resource_offset(src, info->src.level, sbox->z + i); unsigned doff = fd_resource_offset(dst, info->dst.level, dbox->z + i); + unsigned subwcoff = fd_resource_ubwc_offset(src, info->src.level, sbox->z + i); + unsigned dubwcoff = fd_resource_ubwc_offset(dst, info->dst.level, dbox->z + i); /* * Emit source: @@ -459,7 +461,7 @@ emit_blit_texture(struct fd_ringbuffer *ring, const struct pipe_blit_info *info) 0x500000 | filter); OUT_RING(ring, A6XX_SP_PS_2D_SRC_SIZE_WIDTH(width) | A6XX_SP_PS_2D_SRC_SIZE_HEIGHT(height)); /* SP_PS_2D_SRC_SIZE */ - OUT_RELOC(ring, src->bo, soff + src->offset, 0, 0); /* SP_PS_2D_SRC_LO/HI */ + OUT_RELOC(ring, src->bo, soff, 0, 0); /* SP_PS_2D_SRC_LO/HI */ OUT_RING(ring, A6XX_SP_PS_2D_SRC_PITCH_PITCH(spitch)); OUT_RING(ring, 0x00000000); @@ -470,7 +472,7 @@ emit_blit_texture(struct fd_ringbuffer *ring, const struct pipe_blit_info *info) if (fd6_ubwc_enabled(src, stile)) { OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_FLAGS_LO, 6); - OUT_RELOC(ring, src->bo, soff + src->ubwc_offset, 0, 0); + OUT_RELOC(ring, src->bo, subwcoff, 0, 0); OUT_RING(ring, A6XX_RB_MRT_FLAG_BUFFER_PITCH_PITCH(src->ubwc_pitch) | A6XX_RB_MRT_FLAG_BUFFER_PITCH_ARRAY_PITCH(src->ubwc_size)); OUT_RING(ring, 0x00000000); @@ -486,7 +488,7 @@ emit_blit_texture(struct fd_ringbuffer *ring, const struct pipe_blit_info *info) A6XX_RB_2D_DST_INFO_TILE_MODE(dtile) | A6XX_RB_2D_DST_INFO_COLOR_SWAP(dswap) | COND(fd6_ubwc_enabled(dst, dtile), A6XX_RB_2D_DST_INFO_FLAGS)); - OUT_RELOCW(ring, dst->bo, doff + dst->offset, 0, 0); /* RB_2D_DST_LO/HI */ + OUT_RELOCW(ring, dst->bo, doff, 0, 0); /* RB_2D_DST_LO/HI */ OUT_RING(ring, A6XX_RB_2D_DST_SIZE_PITCH(dpitch)); OUT_RING(ring, 0x00000000); OUT_RING(ring, 0x00000000); @@ -496,7 +498,7 @@ emit_blit_texture(struct fd_ringbuffer *ring, const struct pipe_blit_info *info) if (fd6_ubwc_enabled(dst, dtile)) { OUT_PKT4(ring, REG_A6XX_RB_2D_DST_FLAGS_LO, 6); - OUT_RELOCW(ring, dst->bo, doff + dst->ubwc_offset, 0, 0); + OUT_RELOCW(ring, dst->bo, dubwcoff, 0, 0); OUT_RING(ring, A6XX_RB_MRT_FLAG_BUFFER_PITCH_PITCH(dst->ubwc_pitch) | A6XX_RB_MRT_FLAG_BUFFER_PITCH_ARRAY_PITCH(dst->ubwc_size)); OUT_RING(ring, 0x00000000); diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c index fca00204e54..dfa0944cedb 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c @@ -482,7 +482,7 @@ fd6_emit_textures(struct fd_pipe *pipe, struct fd_ringbuffer *ring, if (rsc) { if (view->base.format == PIPE_FORMAT_X32_S8X24_UINT) rsc = rsc->stencil; - OUT_RELOC(state, rsc->bo, view->offset + rsc->offset, + OUT_RELOC(state, rsc->bo, view->offset, (uint64_t)view->texconst5 << 32, 0); } else { OUT_RING(state, 0x00000000); @@ -492,7 +492,7 @@ fd6_emit_textures(struct fd_pipe *pipe, struct fd_ringbuffer *ring, OUT_RING(state, view->texconst6); if (rsc && view->ubwc_enabled) { - OUT_RELOC(state, rsc->bo, view->offset + rsc->ubwc_offset, 0, 0); + OUT_RELOC(state, rsc->bo, view->ubwc_offset, 0, 0); } else { OUT_RING(state, 0); OUT_RING(state, 0); diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c index efdd52d4fc5..9b768a38c5e 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c @@ -63,7 +63,7 @@ emit_mrt(struct fd_ringbuffer *ring, struct pipe_framebuffer_state *pfb, struct fd_resource *rsc = NULL; struct fd_resource_slice *slice = NULL; uint32_t stride = 0; - uint32_t offset = 0; + uint32_t offset, ubwc_offset; uint32_t tile_mode; if (!pfb->cbufs[i]) @@ -88,6 +88,8 @@ emit_mrt(struct fd_ringbuffer *ring, struct pipe_framebuffer_state *pfb, offset = fd_resource_offset(rsc, psurf->u.tex.level, psurf->u.tex.first_layer); + ubwc_offset = fd_resource_ubwc_offset(rsc, psurf->u.tex.level, + psurf->u.tex.first_layer); stride = slice->pitch * rsc->cpp * pfb->samples; swap = rsc->tile_mode ? WZYX : fd6_pipe2swap(pformat); @@ -113,7 +115,7 @@ emit_mrt(struct fd_ringbuffer *ring, struct pipe_framebuffer_state *pfb, A6XX_RB_MRT_BUF_INFO_COLOR_SWAP(swap)); OUT_RING(ring, A6XX_RB_MRT_PITCH(stride)); OUT_RING(ring, A6XX_RB_MRT_ARRAY_PITCH(slice->size0)); - OUT_RELOCW(ring, rsc->bo, offset + rsc->offset, 0, 0); /* BASE_LO/HI */ + OUT_RELOCW(ring, rsc->bo, offset, 0, 0); /* BASE_LO/HI */ OUT_RING(ring, base); /* RB_MRT[i].BASE_GMEM */ OUT_PKT4(ring, REG_A6XX_SP_FS_MRT_REG(i), 1); OUT_RING(ring, A6XX_SP_FS_MRT_REG_COLOR_FORMAT(format) | @@ -122,7 +124,7 @@ emit_mrt(struct fd_ringbuffer *ring, struct pipe_framebuffer_state *pfb, OUT_PKT4(ring, REG_A6XX_RB_MRT_FLAG_BUFFER(i), 3); if (fd6_ubwc_enabled(rsc, tile_mode)) { - OUT_RELOCW(ring, rsc->bo, offset + rsc->ubwc_offset, 0, 0); /* BASE_LO/HI */ + OUT_RELOCW(ring, rsc->bo, ubwc_offset, 0, 0); /* BASE_LO/HI */ OUT_RING(ring, A6XX_RB_MRT_FLAG_BUFFER_PITCH_PITCH(rsc->ubwc_pitch) | A6XX_RB_MRT_FLAG_BUFFER_PITCH_ARRAY_PITCH(rsc->ubwc_size)); } else { @@ -171,6 +173,10 @@ emit_zs(struct fd_ringbuffer *ring, struct pipe_surface *zsbuf, uint32_t stride = slice->pitch * rsc->cpp; uint32_t size = slice->size0; uint32_t base = gmem ? gmem->zsbuf_base[0] : 0; + uint32_t offset = fd_resource_offset(rsc, zsbuf->u.tex.level, + zsbuf->u.tex.first_layer); + uint32_t ubwc_offset = fd_resource_ubwc_offset(rsc, zsbuf->u.tex.level, + zsbuf->u.tex.first_layer); bool ubwc_enabled = !fd_resource_level_linear(zsbuf->texture, zsbuf->u.tex.level) && rsc->ubwc_size; @@ -179,7 +185,7 @@ emit_zs(struct fd_ringbuffer *ring, struct pipe_surface *zsbuf, OUT_RING(ring, A6XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT(fmt)); OUT_RING(ring, A6XX_RB_DEPTH_BUFFER_PITCH(stride)); OUT_RING(ring, A6XX_RB_DEPTH_BUFFER_ARRAY_PITCH(size)); - OUT_RELOCW(ring, rsc->bo, rsc->offset, 0, 0); /* RB_DEPTH_BUFFER_BASE_LO/HI */ + OUT_RELOCW(ring, rsc->bo, offset, 0, 0); /* RB_DEPTH_BUFFER_BASE_LO/HI */ OUT_RING(ring, base); /* RB_DEPTH_BUFFER_BASE_GMEM */ OUT_PKT4(ring, REG_A6XX_GRAS_SU_DEPTH_BUFFER_INFO, 1); @@ -187,7 +193,7 @@ emit_zs(struct fd_ringbuffer *ring, struct pipe_surface *zsbuf, OUT_PKT4(ring, REG_A6XX_RB_DEPTH_FLAG_BUFFER_BASE_LO, 3); if (ubwc_enabled) { - OUT_RELOCW(ring, rsc->bo, rsc->ubwc_offset, 0, 0); /* BASE_LO/HI */ + OUT_RELOCW(ring, rsc->bo, ubwc_offset, 0, 0); /* BASE_LO/HI */ OUT_RING(ring, A6XX_RB_MRT_FLAG_BUFFER_PITCH_PITCH(rsc->ubwc_pitch) | A6XX_RB_MRT_FLAG_BUFFER_PITCH_ARRAY_PITCH(rsc->ubwc_size)); } else { @@ -659,7 +665,7 @@ emit_blit(struct fd_batch *batch, struct fd_resource_slice *slice; struct fd_resource *rsc = fd_resource(psurf->texture); enum pipe_format pfmt = psurf->format; - uint32_t offset; + uint32_t offset, ubwc_offset; /* separate stencil case: */ if (stencil) { @@ -670,6 +676,8 @@ emit_blit(struct fd_batch *batch, slice = fd_resource_slice(rsc, psurf->u.tex.level); offset = fd_resource_offset(rsc, psurf->u.tex.level, psurf->u.tex.first_layer); + ubwc_offset = fd_resource_ubwc_offset(rsc, psurf->u.tex.level, + psurf->u.tex.first_layer); debug_assert(psurf->u.tex.first_layer == psurf->u.tex.last_layer); @@ -694,7 +702,7 @@ emit_blit(struct fd_batch *batch, A6XX_RB_BLIT_DST_INFO_COLOR_FORMAT(format) | A6XX_RB_BLIT_DST_INFO_COLOR_SWAP(swap) | COND(fd6_ubwc_enabled(rsc, tile_mode), A6XX_RB_BLIT_DST_INFO_FLAGS)); - OUT_RELOCW(ring, rsc->bo, offset + rsc->offset, 0, 0); /* RB_BLIT_DST_LO/HI */ + OUT_RELOCW(ring, rsc->bo, offset, 0, 0); /* RB_BLIT_DST_LO/HI */ OUT_RING(ring, A6XX_RB_BLIT_DST_PITCH(stride)); OUT_RING(ring, A6XX_RB_BLIT_DST_ARRAY_PITCH(size)); @@ -703,7 +711,7 @@ emit_blit(struct fd_batch *batch, if (fd6_ubwc_enabled(rsc, tile_mode)) { OUT_PKT4(ring, REG_A6XX_RB_BLIT_FLAG_DST_LO, 3); - OUT_RELOCW(ring, rsc->bo, offset + rsc->ubwc_offset, 0, 0); + OUT_RELOCW(ring, rsc->bo, ubwc_offset, 0, 0); OUT_RING(ring, A6XX_RB_MRT_FLAG_BUFFER_PITCH_PITCH(rsc->ubwc_pitch) | A6XX_RB_MRT_FLAG_BUFFER_PITCH_ARRAY_PITCH(rsc->ubwc_size)); } diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_image.c b/src/gallium/drivers/freedreno/a6xx/fd6_image.c index a38b78907d3..5eb43202dcd 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_image.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_image.c @@ -96,8 +96,8 @@ static void translate_image(struct fd6_image *img, const struct pipe_image_view unsigned lvl = pimg->u.tex.level; unsigned layers = pimg->u.tex.last_layer - pimg->u.tex.first_layer + 1; - img->ubwc_offset = rsc->ubwc_offset; // TODO helper - img->offset = fd_resource_offset(rsc, lvl, pimg->u.tex.first_layer) + rsc->offset; + img->ubwc_offset = fd_resource_ubwc_offset(rsc, lvl, pimg->u.tex.first_layer); + img->offset = fd_resource_offset(rsc, lvl, pimg->u.tex.first_layer); img->pitch = rsc->slices[lvl].pitch * rsc->cpp; switch (prsc->target) { diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_texture.c b/src/gallium/drivers/freedreno/a6xx/fd6_texture.c index b2430cc6c3e..8e6df8caac9 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_texture.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_texture.c @@ -265,6 +265,7 @@ fd6_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc, util_format_get_nblocksx( format, rsc->slices[lvl].pitch) * rsc->cpp); so->offset = fd_resource_offset(rsc, lvl, cso->u.tex.first_layer); + so->ubwc_offset = fd_resource_ubwc_offset(rsc, lvl, cso->u.tex.first_layer); so->ubwc_enabled = rsc->ubwc_size && !fd_resource_level_linear(prsc, lvl); } diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_texture.h b/src/gallium/drivers/freedreno/a6xx/fd6_texture.h index 73a17a5087d..7f0c1538bf4 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_texture.h +++ b/src/gallium/drivers/freedreno/a6xx/fd6_texture.h @@ -54,7 +54,7 @@ struct fd6_pipe_sampler_view { struct pipe_sampler_view base; uint32_t texconst0, texconst1, texconst2, texconst3, texconst5; uint32_t texconst6, texconst7, texconst8, texconst9, texconst10, texconst11; - uint32_t offset; + uint32_t offset, ubwc_offset; uint16_t seqno; bool ubwc_enabled; }; diff --git a/src/gallium/drivers/freedreno/freedreno_resource.h b/src/gallium/drivers/freedreno/freedreno_resource.h index 6a207fe2dc2..2432a6b9c2a 100644 --- a/src/gallium/drivers/freedreno/freedreno_resource.h +++ b/src/gallium/drivers/freedreno/freedreno_resource.h @@ -170,7 +170,20 @@ fd_resource_offset(struct fd_resource *rsc, unsigned level, unsigned layer) offset = slice->offset + (slice->size0 * layer); } debug_assert(offset < fd_bo_size(rsc->bo)); - return offset; + return offset + rsc->offset; +} + +static inline uint32_t +fd_resource_ubwc_offset(struct fd_resource *rsc, unsigned level, unsigned layer) +{ + /* for now this doesn't do anything clever, but when UBWC is enabled + * for multi layer/level images, it will. + */ + if (rsc->ubwc_size) { + debug_assert(level == 0); + debug_assert(layer == 0); + } + return rsc->ubwc_offset; } /* This might be a5xx specific, but higher mipmap levels are always linear: */ -- 2.30.2