From 630b360a56884b338daffd7fff81a545469c8319 Mon Sep 17 00:00:00 2001
From: R Veera Kumar <vklr@vkten.in>
Date: Fri, 1 Apr 2022 14:41:40 +0530
Subject: [PATCH] Add nextpnr-xilinx sections and pages

---
 HDL_workflow.mdwn                | 8 ++++++++
 HDL_workflow/nextpnr-xilinx.mdwn | 9 +++++++++
 2 files changed, 17 insertions(+)
 create mode 100644 HDL_workflow/nextpnr-xilinx.mdwn

diff --git a/HDL_workflow.mdwn b/HDL_workflow.mdwn
index 32660164f..d65d6411c 100644
--- a/HDL_workflow.mdwn
+++ b/HDL_workflow.mdwn
@@ -592,6 +592,14 @@ Needed for the Arty A7 100t Digilent FPGA board.
 See [[HDL_workflow/symbiflow]] for installation instructions
 and dependencies.
 
+## Nextpnr-xilinx
+
+An open source place and route framework for Xilinx FPGAs using Project Xray. We will use it for Xilinx 7-series FPGAs like Artix-7.
+
+Needed for Arty A7 100t Digilent FPGA board.
+
+See [[HDL_workflow/nextpnr-xilinx]] for installation instructions and dependencies.
+
 # Registering for git repository access<a name="gitolite3_access"></a>
 
 After going through the onboarding process and having agreed to take
diff --git a/HDL_workflow/nextpnr-xilinx.mdwn b/HDL_workflow/nextpnr-xilinx.mdwn
new file mode 100644
index 000000000..854caa1db
--- /dev/null
+++ b/HDL_workflow/nextpnr-xilinx.mdwn
@@ -0,0 +1,9 @@
+# Installation instructions for Nextpnr-xilinx with Xilinx Artix7 100T Board
+
+* <https://github.com/gatecat/nextpnr-xilinx>
+
+## Bugzilla page
+
+* <https://bugs.libre-soc.org/show_bug.cgi?id=790>
+
+## Page under work
-- 
2.30.2