From 6315df2ddb2771be3ab41bbf6d943df087851241 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 18 Feb 2019 21:10:07 +0000 Subject: [PATCH] whoops, self.width not self.m_width --- src/add/fmul.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/add/fmul.py b/src/add/fmul.py index c5e3f9d2..deb9ffff 100644 --- a/src/add/fmul.py +++ b/src/add/fmul.py @@ -24,7 +24,7 @@ class FPMUL(FPBase): b = FPNum(self.width, False) z = FPNum(self.width, False) - mw = (self.m_width)*2 - 1 + 3 # sticky/round/guard bits + (2*mant) - 1 + mw = (self.width)*2 - 1 + 3 # sticky/round/guard bits + (2*mant) - 1 product = Signal(mw) of = Overflow() -- 2.30.2