From 631bfb6d257ed849270400cc7f6a39afdb732dff Mon Sep 17 00:00:00 2001 From: Giacomo Travaglini Date: Mon, 18 Feb 2019 14:15:41 +0000 Subject: [PATCH] dev-arm: Rename GIC maintenance interrupt from ppint to maint_int ppint is a generic name which only reflects Arm recommendation of assigning the maintanance interrupt to a PPI (numbered 25) Change-Id: Ic5abb6ed50817ad2d165b5df46dd989eb195a9db Signed-off-by: Giacomo Travaglini Reviewed-by: Anouk Van Laer Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17628 Reviewed-by: Andreas Sandberg Maintainer: Andreas Sandberg --- src/dev/arm/Gic.py | 4 ++-- src/dev/arm/RealView.py | 4 ++-- src/dev/arm/vgic.cc | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/dev/arm/Gic.py b/src/dev/arm/Gic.py index 29535e4e9..014d4dfe4 100644 --- a/src/dev/arm/Gic.py +++ b/src/dev/arm/Gic.py @@ -128,7 +128,7 @@ class VGic(PioDevice): hv_addr = Param.Addr(0, "Address for hv control") pio_delay = Param.Latency('10ns', "Delay for PIO r/w") # The number of list registers is not currently configurable at runtime. - ppint = Param.UInt32("HV maintenance interrupt number") + maint_int = Param.UInt32("HV maintenance interrupt number") # gicv_iidr same as gicc_idr gicv_iidr = Param.UInt32(Self.gic.gicc_iidr, @@ -156,7 +156,7 @@ class VGic(PioDevice): node.append(FdtPropertyWords("reg", regs)) node.append(FdtPropertyWords("interrupts", - [1, int(self.ppint)-16, 0xf04])) + [1, int(self.maint_int)-16, 0xf04])) node.appendPhandle(gic) diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py index 35bc86227..41d5fc893 100644 --- a/src/dev/arm/RealView.py +++ b/src/dev/arm/RealView.py @@ -728,7 +728,7 @@ class VExpress_EMM(RealView): ### On-chip devices ### gic = Gic400(dist_addr=0x2C001000, cpu_addr=0x2C002000) - vgic = VGic(vcpu_addr=0x2c006000, hv_addr=0x2c004000, ppint=25) + vgic = VGic(vcpu_addr=0x2c006000, hv_addr=0x2c004000, maint_int=25) local_cpu_timer = CpuLocalTimer(int_timer=ArmPPI(num=29), int_watchdog=ArmPPI(num=30), @@ -1062,7 +1062,7 @@ Interrupts: class VExpress_GEM5_V1_Base(VExpress_GEM5_Base): gic = kvm_gicv2_class(dist_addr=0x2c001000, cpu_addr=0x2c002000, it_lines=512) - vgic = VGic(vcpu_addr=0x2c006000, hv_addr=0x2c004000, ppint=25) + vgic = VGic(vcpu_addr=0x2c006000, hv_addr=0x2c004000, maint_int=25) gicv2m = Gicv2m() gicv2m.frames = [ Gicv2mFrame(spi_base=256, spi_len=64, addr=0x2c1c0000), diff --git a/src/dev/arm/vgic.cc b/src/dev/arm/vgic.cc index adb670b40..1f5da2fea 100644 --- a/src/dev/arm/vgic.cc +++ b/src/dev/arm/vgic.cc @@ -49,7 +49,7 @@ VGic::VGic(const Params *p) : PioDevice(p), gicvIIDR(p->gicv_iidr), platform(p->platform), gic(p->gic), vcpuAddr(p->vcpu_addr), hvAddr(p->hv_addr), - pioDelay(p->pio_delay), maintInt(p->ppint) + pioDelay(p->pio_delay), maintInt(p->maint_int) { for (int x = 0; x < VGIC_CPU_MAX; x++) { postVIntEvent[x] = new EventFunctionWrapper( -- 2.30.2