From 6338d667387cc5fac8dd39bc6edfa43aff06c22c Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 15 Aug 2020 22:33:25 +0100 Subject: [PATCH] clear compalu data latch always on issue --- src/soc/experiment/compalu_multi.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/experiment/compalu_multi.py b/src/soc/experiment/compalu_multi.py index c4dcfd15..79d4ccd1 100644 --- a/src/soc/experiment/compalu_multi.py +++ b/src/soc/experiment/compalu_multi.py @@ -276,7 +276,7 @@ class MultiCompUnit(RegSpecALUAPI, Elaboratable): wrok.append(ok & self.busy_o) with m.If(alu_pulse): m.d.sync += data_r.eq(lro) - with m.Elif(self.issue_i): + with m.If(self.issue_i): m.d.sync += data_r.eq(0) drl.append(data_r) -- 2.30.2