From 636929b8d68c11f92ed3fa47614a38915d9476f4 Mon Sep 17 00:00:00 2001 From: James Greenhalgh Date: Mon, 20 Jun 2016 13:42:30 +0000 Subject: [PATCH] [Patch AArch64] Add some more missing intrinsics gcc/ChangeLog 2016-06-20 James Greenhalgh * config/aarch64/arm_neon.h (vcvt_n_f64_s64): New. (vcvt_n_f64_u64): Likewise. (vcvt_n_s64_f64): Likewise. (vcvt_n_u64_f64): Likewise. (vcvt_f64_s64): Likewise. (vrecpe_f64): Likewise. (vcvt_f64_u64): Likewise. (vrecps_f64): Likewise. gcc/testsuite/ChangeLog 2016-06-20 James Greenhalgh * gcc.target/aarch64/vcvt_f64_1.c: New. * gcc.target/aarch64/vcvt_n_f64_1.c: New. * gcc.target/aarch64/vrecp_f64_1.c: New. From-SVN: r237603 --- gcc/ChangeLog | 11 ++++++++ gcc/config/aarch64/arm_neon.h | 53 +++++++++++++++++++++++++++++++++++ gcc/testsuite/ChangeLog | 6 ++++ 3 files changed, 70 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1e01322952f..fde5823e10a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,14 @@ +2016-06-20 James Greenhalgh + + * config/aarch64/arm_neon.h (vcvt_n_f64_s64): New. + (vcvt_n_f64_u64): Likewise. + (vcvt_n_s64_f64): Likewise. + (vcvt_n_u64_f64): Likewise. + (vcvt_f64_s64): Likewise. + (vrecpe_f64): Likewise. + (vcvt_f64_u64): Likewise. + (vrecps_f64): Likewise. + 2016-06-20 James Greenhalgh * config/aarch64/aarch64.md diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h index f70b6d367c5..ebf6fa2b63e 100644 --- a/gcc/config/aarch64/arm_neon.h +++ b/gcc/config/aarch64/arm_neon.h @@ -12447,6 +12447,20 @@ vcvt_n_f32_u32 (uint32x2_t __a, const int __b) return __builtin_aarch64_ucvtfv2si_sus (__a, __b); } +__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) +vcvt_n_f64_s64 (int64x1_t __a, const int __b) +{ + return (float64x1_t) + { __builtin_aarch64_scvtfdi (vget_lane_s64 (__a, 0), __b) }; +} + +__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) +vcvt_n_f64_u64 (uint64x1_t __a, const int __b) +{ + return (float64x1_t) + { __builtin_aarch64_ucvtfdi_sus (vget_lane_u64 (__a, 0), __b) }; +} + __extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) vcvtq_n_f32_s32 (int32x4_t __a, const int __b) { @@ -12509,6 +12523,20 @@ vcvt_n_u32_f32 (float32x2_t __a, const int __b) return __builtin_aarch64_fcvtzuv2sf_uss (__a, __b); } +__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) +vcvt_n_s64_f64 (float64x1_t __a, const int __b) +{ + return (int64x1_t) + { __builtin_aarch64_fcvtzsdf (vget_lane_f64 (__a, 0), __b) }; +} + +__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) +vcvt_n_u64_f64 (float64x1_t __a, const int __b) +{ + return (uint64x1_t) + { __builtin_aarch64_fcvtzudf_uss (vget_lane_f64 (__a, 0), __b) }; +} + __extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) vcvtq_n_s32_f32 (float32x4_t __a, const int __b) { @@ -12571,6 +12599,18 @@ vcvt_f32_u32 (uint32x2_t __a) return __builtin_aarch64_floatunsv2siv2sf ((int32x2_t) __a); } +__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) +vcvt_f64_s64 (int64x1_t __a) +{ + return (float64x1_t) { vget_lane_s64 (__a, 0) }; +} + +__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) +vcvt_f64_u64 (uint64x1_t __a) +{ + return (float64x1_t) { vget_lane_u64 (__a, 0) }; +} + __extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) vcvtq_f32_s32 (int32x4_t __a) { @@ -20659,6 +20699,12 @@ vrecpe_f32 (float32x2_t __a) return __builtin_aarch64_frecpev2sf (__a); } +__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) +vrecpe_f64 (float64x1_t __a) +{ + return (float64x1_t) { vrecped_f64 (vget_lane_f64 (__a, 0)) }; +} + __extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) vrecpeq_f32 (float32x4_t __a) { @@ -20691,6 +20737,13 @@ vrecps_f32 (float32x2_t __a, float32x2_t __b) return __builtin_aarch64_frecpsv2sf (__a, __b); } +__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) +vrecps_f64 (float64x1_t __a, float64x1_t __b) +{ + return (float64x1_t) { vrecpsd_f64 (vget_lane_f64 (__a, 0), + vget_lane_f64 (__b, 0)) }; +} + __extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) vrecpsq_f32 (float32x4_t __a, float32x4_t __b) { diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 542306a83aa..b92b574696a 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2016-06-20 James Greenhalgh + + * gcc.target/aarch64/vcvt_f64_1.c: New. + * gcc.target/aarch64/vcvt_n_f64_1.c: New. + * gcc.target/aarch64/vrecp_f64_1.c: New. + 2016-06-20 Kyrylo Tkachov * gfortran.dg/common_align_2.f90: Use "alignment" instead of -- 2.30.2