From 636b1eb02e2111db90d2c18804c3a26253738494 Mon Sep 17 00:00:00 2001 From: lkcl Date: Wed, 7 Jul 2021 12:27:57 +0100 Subject: [PATCH] --- conferences/iit_roorkee_2021.mdwn | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/conferences/iit_roorkee_2021.mdwn b/conferences/iit_roorkee_2021.mdwn index bee3b7137..152360cbe 100644 --- a/conferences/iit_roorkee_2021.mdwn +++ b/conferences/iit_roorkee_2021.mdwn @@ -19,7 +19,13 @@ simply not normal Industry-Standard practice. This talk therefore goes through the workflow, from the original HDL through to the GDS-II layout, showing how we were able to keep track of the development that led to the IMEC 180nm tape-out in -July 2021. +July 2021. In particular, by following a parallel development +process involving "Real" and "Symbolic" Cell Libraries, developed +by Chips4Makers, will be shown how our developers did not need to +sign a Foundry NDA, but were still able to work side-by-side with +a University that did. With this parallel development process, +the University upheld their NDA obligations, and Libre-SOC were +simultaneously able to honour its Transparency Objectives. # Links -- 2.30.2