From 637e71a4852888d4b16369b0ffbb05f15759c6f1 Mon Sep 17 00:00:00 2001
From: Jean-Paul Chaput <Jean-Paul.Chaput@lip6.fr>
Date: Tue, 2 Mar 2021 12:23:36 +0100
Subject: [PATCH] First working power plane in experiment12.

---
 experiments12/Makefile              |  3 +--
 experiments12/coriolis2/settings.py |  6 +++---
 experiments12/doDesign.py           | 12 +++++++-----
 3 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/experiments12/Makefile b/experiments12/Makefile
index 76b4384..14863fc 100755
--- a/experiments12/Makefile
+++ b/experiments12/Makefile
@@ -8,8 +8,7 @@
                      CORE = memory
             USE_CLOCKTREE = Yes
                 USE_DEBUG = No
-                 USE_KITE = No
-                  RM_CHIP = No
+                  RM_CHIP = Yes
 
                 VST_FLAGS = --vst-no-lowercase
             YOSYS_FLATTEN =
diff --git a/experiments12/coriolis2/settings.py b/experiments12/coriolis2/settings.py
index a8e287b..cb8e5a9 100644
--- a/experiments12/coriolis2/settings.py
+++ b/experiments12/coriolis2/settings.py
@@ -29,8 +29,8 @@ LibreSOCMem.setup()
 
 with overlay.CfgCache('', priority=Cfg.Parameter.Priority.UserFile) as cfg:
     cfg.misc.catchCore               = False
-    cfg.misc.minTraceLevel           = 14900
-    cfg.misc.maxTraceLevel           = 15000
+    cfg.misc.minTraceLevel           = 15900
+    cfg.misc.maxTraceLevel           = 16000
     cfg.misc.info                    = False
     cfg.misc.paranoid                = False
     cfg.misc.bug                     = False
@@ -42,7 +42,7 @@ with overlay.CfgCache('', priority=Cfg.Parameter.Priority.UserFile) as cfg:
     cfg.conductor.maxPlaceIterations = 2
     cfg.conductor.useFixedAbHeight   = False
     env = AllianceFramework.get().getEnvironment()
-    env.setCLOCK( '^sys_clk$|^ck|^jtag_tck$' )
+    env.setCLOCK( '^clk$|^ck|^jtag_tck$' )
     env.setPOWER ('vdd')
     env.setGROUND('vss')
 
diff --git a/experiments12/doDesign.py b/experiments12/doDesign.py
index 7a2822e..497a048 100644
--- a/experiments12/doDesign.py
+++ b/experiments12/doDesign.py
@@ -52,7 +52,7 @@ def scriptMain ( **kw ):
     global af
     rvalue = True
     try:
-       #helpers.setTraceLevel( 540 )
+        #helpers.setTraceLevel( 550 )
         Breakpoint.setStopLevel( 100 )
         buildChip = True
         cell, editor = plugins.kwParseMain( **kw )
@@ -100,9 +100,11 @@ def scriptMain ( **kw ):
        #memoryConf.cfg.chip.padCoreSide            = 'North'
        #memoryConf.cfg.chip.use45corners           = False
         memoryConf.cfg.chip.useAbstractPads        = True
+        memoryConf.cfg.chip.supplyRailWidth        = u(35)
+        memoryConf.cfg.chip.supplyRailPitch        = u(90)
         memoryConf.editor              = editor
-        memoryConf.useSpares           = False
-        memoryConf.useClockTree        = False
+        memoryConf.useSpares           = True
+        memoryConf.useClockTree        = True
         memoryConf.useHFNS             = False
         memoryConf.bColumns            = 2
         memoryConf.bRows               = 3
@@ -129,8 +131,8 @@ def scriptMain ( **kw ):
                            , Instance.PlacementStatus.FIXED )
                 sramAb = sram.getAbutmentBox()
                 memoryConf.placeArea = Box( coreAb.getXMin()
-                                          , coreAb.getYMax() - sliceHeight*10
-                                          , coreAb.getXMax()
+                                          , coreAb.getYMax() - sliceHeight*26
+                                          , coreAb.getXMin() + sliceHeight*25
                                           , coreAb.getYMax()
                                           )
         Breakpoint.stop( 99, 'After core block placement.' )
-- 
2.30.2