From 638b5fcaa0dd5b3ee5f3fd430f4c27d9a847fa07 Mon Sep 17 00:00:00 2001 From: Richard Earnshaw Date: Wed, 16 Jan 2019 15:22:08 +0000 Subject: [PATCH] __builtin__overflow issues on AArch64 (redux) (cont) And the ChangeLog for PR target/86891 fix. From-SVN: r267972 --- gcc/ChangeLog | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index bfe5b628958..78983572b23 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,32 @@ +2019-01-16 Richard Earnshaw + + PR target/86891 + * config/aarch64/aarch64-modes.def: Add comment about how the carry + bit is set by add and compare. + (CC_ADC): New CC_MODE. + * config/aarch64/aarch64.c (aarch64_select_cc_mode): Use variables + to cache the code and mode of X. Adjust the shape of a CC_Cmode + comparison. Add detection for CC_ADCmode. + (aarch64_get_condition_code_1): Update code support for CC_Cmode. Add + CC_ADCmode. + * config/aarch64/aarch64.md (uaddv4): Use LTU with CCmode. + (uaddvti4): Comparison result is in CC_ADCmode and the condition is GEU. + (add3_compareC_cconly_imm): Delete. Merge into... + (add3_compareC_cconly): ... this. Restructure the comparison + to eliminate the need for zero-extending the operands. + (add3_compareC_imm): Delete. Merge into ... + (add3_compareC): ... this. Restructure the comparison to + eliminate the need for zero-extending the operands. + (add3_carryin): Use LTU for the overflow detection. + (add3_carryinC): Use CC_ADCmode for the result of the carry out. + Reexpress comparison for overflow. + (add3_carryinC_zero): Update for change to add3_carryinC. + (add3_carryinC): Likewise. + (add3_carryinV): Use LTU for carry between partials. + * config/aarch64/predicates.md (aarch64_carry_operation): Update + handling of CC_Cmode and add CC_ADCmode. + (aarch64_borrow_operation): Likewise. + 2019-01-16 Tamar Christina * config/arm/arm-protos.h (neon_vcmla_lane_prepare_operands): Remove patternmode. -- 2.30.2