From 63b4cc53dc41c755f8b30d85edf29c153f76eba3 Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Mon, 29 Mar 2021 09:52:56 +1030 Subject: [PATCH] TRUE/FALSE simplification There is really no need to write code like "foo != 0 ? TRUE : FALSE" unless we had stupidly defined FALSE as something other than 0 or TRUE as something other than 1. The simpler "foo != 0" does just as well. Similarly "(condition == TRUE)" or "(condition == FALSE) can be simplified to "(condition)" and "(!condition)" respectively. I'll note that there is reason to use "integer_expression != 0" when assigning a bfd_boolean rather than the simpler "integer_expression", if you expect the variable to have 0 or 1 value. It's probably even a good idea to not rely on implicit conversion if bfd_boolean were _Bool. bfd/ * aoutx.h (aout_link_write_symbols): Don't cast boolean expression to bfd_boolean. * elf32-or1k.c (or1k_set_got_and_rela_sizes): Dont compare booleans against FALSE. * elf32-arc.c (name_for_global_symbol): Don't compare boolean to TRUE. (is_reloc_PC_relative): Don't use "boolean_condition ? TRUE : FALSE". (is_reloc_SDA_relative, is_reloc_for_GOT): Likewise. (is_reloc_for_PLT, is_reloc_for_TLS): Likewise. * elf32-arm.c (stm32l4xx_need_create_replacing_stub): Likewise. * elf32-nds32.c (insert_nds32_elf_blank): Likewise. * elf32-rx.c (rx_set_section_contents): Likewise. * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Likewise. * elfxx-mips.c (_bfd_mips_elf_ignore_undef_symbol): Likewise. * mach-o.c (bfd_mach_o_read_command): Likewise. * targets.c (bfd_get_target_info): Likewise. binutils/ * dlltool.c (main): Don't use "boolean_condition ? TRUE : FALSE". * dwarf.c (read_and_display_attr_value): Likewise. (display_debug_str_offsets): Likewise. * objdump.c (dump_bfd): Likewise. * readelf.c (dump_section_as_strings): Likewise. (dump_section_as_bytes): Likewise. gas/ * atof-generic.c (FALSE, TRUE): Don't define. * config/obj-elf.h (FALSE, TRUE): Don't define. * config/obj-som.h (FALSE, TRUE): Don't define. * config/tc-hppa.h (FALSE, TRUE): Don't define. * config/tc-pdp11.c (FALSE, TRUE): Don't define. * config/tc-iq2000.h (obj_fix_adjustable): Delete. * config/tc-m32r.h (TC_FIX_ADJUSTABLE): Delete. * config/tc-mt.h (obj_fix_adjustable): Delete. * config/tc-nds32.h (TC_FIX_ADJUSTABLE): Delete. * config/tc-arc.c (parse_opcode_flags): Simplify boolean expression. (relaxable_flag, relaxable_operand, assemble_insn): Likewise. (tokenize_extregister): Likewise. * config/tc-csky.c (parse_opcode, get_operand_value): Likewise. (parse_operands_op, parse_operands, md_assemble): Likewise. * config/tc-d10v.c (build_insn): Likewise. * config/tc-score.c (s3_gen_insn_frag): Likewise. * config/tc-score7.c (s7_gen_insn_frag, s7_relax_frag): Likewise. * config/tc-tic6x.c (tic6x_update_features, md_assemble): Likewise. * config/tc-z80.c (emit_byte): Likewise. include/ * opcode/aarch64.h (alias_opcode_p): Simplify boolean expression. (opcode_has_alias, pseudo_opcode_p, optional_operand_p): Likewise. (opcode_has_special_coder): Likewise. ld/ * emultempl/aix.em (gld${EMULATION_NAME}_before_allocation): Simplify boolean expression. * lexsup.c (parse_args): Likewise. * pe-dll.c (pe_dll_id_target): Likewise. opcodes/ * aarch64-opc.c (vector_qualifier_p): Simplify boolean expression. (fp_qualifier_p, get_data_pattern): Likewise. (aarch64_get_operand_modifier_from_value): Likewise. (aarch64_extend_operator_p, aarch64_shift_operator_p): Likewise. (operand_variant_qualifier_p): Likewise. (qualifier_value_in_range_constraint_p): Likewise. (aarch64_get_qualifier_esize): Likewise. (aarch64_get_qualifier_nelem): Likewise. (aarch64_get_qualifier_standard_value): Likewise. (get_lower_bound, get_upper_bound): Likewise. (aarch64_find_best_match, match_operands_qualifier): Likewise. (aarch64_print_operand): Likewise. * aarch64-opc.h (operand_has_inserter, operand_has_extractor): Likewise. (operand_need_sign_extension, operand_need_shift_by_two): Likewise. (operand_need_shift_by_four, operand_maybe_stack_pointer): Likewise. * arm-dis.c (print_insn_mve, print_insn_thumb32): Likewise. * tic6x-dis.c (tic6x_check_fetch_packet_header): Likewise. (print_insn_tic6x): Likewise. --- bfd/ChangeLog | 18 ++++++++++++++ bfd/aoutx.h | 2 +- bfd/elf32-arc.c | 12 ++++----- bfd/elf32-arm.c | 6 ++--- bfd/elf32-nds32.c | 2 +- bfd/elf32-or1k.c | 4 +-- bfd/elf32-rx.c | 4 +-- bfd/elfnn-aarch64.c | 2 +- bfd/elfxx-mips.c | 2 +- bfd/mach-o.c | 2 +- bfd/targets.c | 3 +-- binutils/ChangeLog | 9 +++++++ binutils/dlltool.c | 2 +- binutils/dwarf.c | 8 +++--- binutils/objdump.c | 2 +- binutils/readelf.c | 4 +-- gas/ChangeLog | 22 ++++++++++++++++ gas/atof-generic.c | 7 ------ gas/config/obj-elf.h | 5 ---- gas/config/obj-som.h | 5 ---- gas/config/tc-arc.c | 14 +++++------ gas/config/tc-csky.c | 40 ++++++++++++++--------------- gas/config/tc-d10v.c | 3 +-- gas/config/tc-hppa.h | 6 ----- gas/config/tc-iq2000.h | 2 -- gas/config/tc-m32r.h | 8 +----- gas/config/tc-mt.h | 3 --- gas/config/tc-nds32.h | 3 --- gas/config/tc-pdp11.c | 3 --- gas/config/tc-score.c | 2 +- gas/config/tc-score7.c | 4 +-- gas/config/tc-tic6x.c | 12 ++++----- gas/config/tc-z80.c | 2 +- include/ChangeLog | 6 +++++ include/opcode/aarch64.h | 12 ++++----- ld/ChangeLog | 7 ++++++ ld/emultempl/aix.em | 5 ++-- ld/lexsup.c | 2 +- ld/pe-dll.c | 2 +- opcodes/ChangeLog | 21 ++++++++++++++++ opcodes/aarch64-opc.c | 54 ++++++++++++++++++---------------------- opcodes/aarch64-opc.h | 12 ++++----- opcodes/arm-dis.c | 8 +++--- opcodes/tic6x-dis.c | 27 ++++++++++---------- 44 files changed, 203 insertions(+), 176 deletions(-) diff --git a/bfd/ChangeLog b/bfd/ChangeLog index fbfc4dbed1d..6d361d56b98 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,21 @@ +2021-03-29 Alan Modra + + * aoutx.h (aout_link_write_symbols): Don't cast boolean expression + to bfd_boolean. + * elf32-or1k.c (or1k_set_got_and_rela_sizes): Dont compare booleans + against FALSE. + * elf32-arc.c (name_for_global_symbol): Don't compare boolean to TRUE. + (is_reloc_PC_relative): Don't use "boolean_condition ? TRUE : FALSE". + (is_reloc_SDA_relative, is_reloc_for_GOT): Likewise. + (is_reloc_for_PLT, is_reloc_for_TLS): Likewise. + * elf32-arm.c (stm32l4xx_need_create_replacing_stub): Likewise. + * elf32-nds32.c (insert_nds32_elf_blank): Likewise. + * elf32-rx.c (rx_set_section_contents): Likewise. + * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Likewise. + * elfxx-mips.c (_bfd_mips_elf_ignore_undef_symbol): Likewise. + * mach-o.c (bfd_mach_o_read_command): Likewise. + * targets.c (bfd_get_target_info): Likewise. + 2021-03-29 Alan Modra * coff-z80.c (z80_is_local_label_name): Return bfd_boolean. diff --git a/bfd/aoutx.h b/bfd/aoutx.h index 8025b8c5241..8761a6ac853 100644 --- a/bfd/aoutx.h +++ b/bfd/aoutx.h @@ -5209,7 +5209,7 @@ aout_link_write_symbols (struct aout_final_link_info *flaginfo, bfd *input_bfd) /* If we have already included a header file with the same value, then replace this one with an N_EXCL symbol. */ - copy = (bfd_boolean) (! flaginfo->info->keep_memory); + copy = !flaginfo->info->keep_memory; incl_entry = aout_link_includes_lookup (&flaginfo->includes, name, TRUE, copy); if (incl_entry == NULL) diff --git a/bfd/elf32-arc.c b/bfd/elf32-arc.c index 32096fe4897..c796104afda 100644 --- a/bfd/elf32-arc.c +++ b/bfd/elf32-arc.c @@ -55,7 +55,7 @@ name_for_global_symbol (struct elf_link_hash_entry *h) Elf_Internal_Rela _rel; \ bfd_byte * _loc; \ \ - if (_htab->dynamic_sections_created == TRUE) \ + if (_htab->dynamic_sections_created) \ { \ BFD_ASSERT (_htab->srel##SECTION &&_htab->srel##SECTION->contents); \ _loc = _htab->srel##SECTION->contents \ @@ -128,13 +128,13 @@ bfd_put_32_me (bfd *abfd, bfd_vma value,unsigned char *data) static ATTRIBUTE_UNUSED bfd_boolean is_reloc_PC_relative (reloc_howto_type *howto) { - return (strstr (howto->name, "PC") != NULL) ? TRUE : FALSE; + return strstr (howto->name, "PC") != NULL; } static bfd_boolean is_reloc_SDA_relative (reloc_howto_type *howto) { - return (strstr (howto->name, "SDA") != NULL) ? TRUE : FALSE; + return strstr (howto->name, "SDA") != NULL; } static bfd_boolean @@ -142,19 +142,19 @@ is_reloc_for_GOT (reloc_howto_type * howto) { if (strstr (howto->name, "TLS") != NULL) return FALSE; - return (strstr (howto->name, "GOT") != NULL) ? TRUE : FALSE; + return strstr (howto->name, "GOT") != NULL; } static bfd_boolean is_reloc_for_PLT (reloc_howto_type * howto) { - return (strstr (howto->name, "PLT") != NULL) ? TRUE : FALSE; + return strstr (howto->name, "PLT") != NULL; } static bfd_boolean is_reloc_for_TLS (reloc_howto_type *howto) { - return (strstr (howto->name, "TLS") != NULL) ? TRUE : FALSE; + return strstr (howto->name, "TLS") != NULL; } struct arc_relocation_data diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c index d70529d6dec..7d7c3edab16 100644 --- a/bfd/elf32-arm.c +++ b/bfd/elf32-arm.c @@ -8796,9 +8796,9 @@ stm32l4xx_need_create_replacing_stub (const insn32 insn, /* DEFAULT mode accounts for the real bug condition situation, ALL mode inserts stubs for each LDM/VLDM instruction (testing). */ - return - (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 : - (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE; + return (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT + ? nb_words > 8 + : stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL); } /* Look for potentially-troublesome code sequences which might trigger diff --git a/bfd/elf32-nds32.c b/bfd/elf32-nds32.c index f6a89a78834..61a52af56ac 100644 --- a/bfd/elf32-nds32.c +++ b/bfd/elf32-nds32.c @@ -9038,7 +9038,7 @@ insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len) if (!*blank_p) { *blank_p = create_nds32_elf_blank (addr, len); - return *blank_p ? TRUE : FALSE; + return *blank_p != NULL; } blank_t = search_nds32_elf_blank (*blank_p, addr); diff --git a/bfd/elf32-or1k.c b/bfd/elf32-or1k.c index 5f9d26ce524..18048540647 100644 --- a/bfd/elf32-or1k.c +++ b/bfd/elf32-or1k.c @@ -2698,7 +2698,7 @@ or1k_set_got_and_rela_sizes (const unsigned char tls_type, is_tls_entry = TRUE; } - if (is_tls_entry == FALSE) + if (!is_tls_entry) *got_size += 4; if (dynamic) @@ -2709,7 +2709,7 @@ or1k_set_got_and_rela_sizes (const unsigned char tls_type, if ((tls_type & TLS_IE) != 0) *rela_size += sizeof (Elf32_External_Rela); - if (is_tls_entry == FALSE) + if (!is_tls_entry) *rela_size += sizeof (Elf32_External_Rela); } } diff --git a/bfd/elf32-rx.c b/bfd/elf32-rx.c index 7b6cf9af241..cd0bc002c86 100644 --- a/bfd/elf32-rx.c +++ b/bfd/elf32-rx.c @@ -3541,8 +3541,8 @@ rx_set_section_contents (bfd * abfd, file_ptr offset, bfd_size_type count) { - bfd_boolean exec = (abfd->flags & EXEC_P) ? TRUE : FALSE; - bfd_boolean s_code = (section->flags & SEC_CODE) ? TRUE : FALSE; + bfd_boolean exec = (abfd->flags & EXEC_P) != 0; + bfd_boolean s_code = (section->flags & SEC_CODE) != 0; bfd_boolean rv; char * swapped_data = NULL; bfd_size_type i; diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c index 3ec0983caff..86130b424ac 100644 --- a/bfd/elfnn-aarch64.c +++ b/bfd/elfnn-aarch64.c @@ -5769,7 +5769,7 @@ elfNN_aarch64_final_link_relocate (reloc_howto_type *howto, relocate the text and data segments independently, so the symbol does not matter. */ symbol = 0; - relocate = globals->no_apply_dynamic_relocs ? FALSE : TRUE; + relocate = !globals->no_apply_dynamic_relocs; outrel.r_info = ELFNN_R_INFO (symbol, AARCH64_R (RELATIVE)); outrel.r_addend += value; } diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c index 07a233ff920..bd4140cc3e4 100644 --- a/bfd/elfxx-mips.c +++ b/bfd/elfxx-mips.c @@ -16395,7 +16395,7 @@ _bfd_mips_elf_merge_symbol_attribute (struct elf_link_hash_entry *h, bfd_boolean _bfd_mips_elf_ignore_undef_symbol (struct elf_link_hash_entry *h) { - return ELF_MIPS_IS_OPTIONAL (h->other) ? TRUE : FALSE; + return ELF_MIPS_IS_OPTIONAL (h->other) != 0; } bfd_boolean diff --git a/bfd/mach-o.c b/bfd/mach-o.c index f853783df2d..695b15811cd 100644 --- a/bfd/mach-o.c +++ b/bfd/mach-o.c @@ -4930,7 +4930,7 @@ bfd_mach_o_read_command (bfd *abfd, bfd_mach_o_load_command *command, cmd = bfd_h_get_32 (abfd, raw.cmd); command->type = cmd & ~BFD_MACH_O_LC_REQ_DYLD; - command->type_required = cmd & BFD_MACH_O_LC_REQ_DYLD ? TRUE : FALSE; + command->type_required = (cmd & BFD_MACH_O_LC_REQ_DYLD) != 0; command->len = bfd_h_get_32 (abfd, raw.cmdsize); if (command->len < 8 || command->len % 4 != 0) return FALSE; diff --git a/bfd/targets.c b/bfd/targets.c index dcd42636df0..372a9c3896f 100644 --- a/bfd/targets.c +++ b/bfd/targets.c @@ -1654,8 +1654,7 @@ bfd_get_target_info (const char *target_name, bfd *abfd, if (! target_vec) return NULL; if (is_bigendian) - *is_bigendian = ((target_vec->byteorder == BFD_ENDIAN_BIG) ? TRUE - : FALSE); + *is_bigendian = target_vec->byteorder == BFD_ENDIAN_BIG; if (underscoring) *underscoring = ((int) target_vec->symbol_leading_char) & 0xff; diff --git a/binutils/ChangeLog b/binutils/ChangeLog index f532e1cd60c..8928e2319d1 100644 --- a/binutils/ChangeLog +++ b/binutils/ChangeLog @@ -1,3 +1,12 @@ +2021-03-29 Alan Modra + + * dlltool.c (main): Don't use "boolean_condition ? TRUE : FALSE". + * dwarf.c (read_and_display_attr_value): Likewise. + (display_debug_str_offsets): Likewise. + * objdump.c (dump_bfd): Likewise. + * readelf.c (dump_section_as_strings): Likewise. + (dump_section_as_bytes): Likewise. + 2021-03-29 Alan Modra * objdump.c (process_links): Use type int. diff --git a/binutils/dlltool.c b/binutils/dlltool.c index ca31df964ef..b7fdebc66f8 100644 --- a/binutils/dlltool.c +++ b/binutils/dlltool.c @@ -3957,7 +3957,7 @@ main (int ac, char **av) bfd_get_target_info (mtable[machine].how_bfd_target, NULL, NULL, &u, NULL); if (u != -1) - leading_underscore = (u != 0 ? TRUE : FALSE); + leading_underscore = u != 0; } if (!dll_name && exp_name) diff --git a/binutils/dwarf.c b/binutils/dwarf.c index 74f28f563ce..23ee70510f7 100644 --- a/binutils/dwarf.c +++ b/binutils/dwarf.c @@ -2727,8 +2727,8 @@ read_and_display_attr_value (unsigned long attribute, case DW_FORM_strx4: if (!do_loc) { - const char * suffix = strrchr (section->name, '.'); - bfd_boolean dwo = (suffix && strcmp (suffix, ".dwo") == 0) ? TRUE : FALSE; + const char *suffix = strrchr (section->name, '.'); + bfd_boolean dwo = suffix && strcmp (suffix, ".dwo") == 0; if (do_wide) /* We have already displayed the form name. */ @@ -7545,8 +7545,8 @@ display_debug_str_offsets (struct dwarf_section *section, unsigned char *end = start + section->size; unsigned char *curr = start; - const char * suffix = strrchr (section->name, '.'); - bfd_boolean dwo = (suffix && strcmp (suffix, ".dwo") == 0) ? TRUE : FALSE; + const char *suffix = strrchr (section->name, '.'); + bfd_boolean dwo = suffix && strcmp (suffix, ".dwo") == 0; if (dwo) load_debug_section_with_follow (str_dwo, file); diff --git a/binutils/objdump.c b/binutils/objdump.c index 7d8f9d7bde0..0d76fb79397 100644 --- a/binutils/objdump.c +++ b/binutils/objdump.c @@ -4950,7 +4950,7 @@ dump_bfd (bfd *abfd, bfd_boolean is_mainfile) { if (!print_debugging_info (stdout, dhandle, abfd, syms, bfd_demangle, - dump_debugging_tags ? TRUE : FALSE)) + dump_debugging_tags != 0)) { non_fatal (_("%s: printing debugging information failed"), bfd_get_filename (abfd)); diff --git a/binutils/readelf.c b/binutils/readelf.c index c995911f525..8b32dab1ee6 100644 --- a/binutils/readelf.c +++ b/binutils/readelf.c @@ -14454,7 +14454,7 @@ dump_section_as_strings (Elf_Internal_Shdr * section, Filedata * filedata) real_start = start = (unsigned char *) get_section_contents (section, filedata); if (start == NULL) /* PR 21820: Do not fail if the section was empty. */ - return (section->sh_size == 0 || section->sh_type == SHT_NOBITS) ? TRUE : FALSE; + return section->sh_size == 0 || section->sh_type == SHT_NOBITS; num_bytes = section->sh_size; @@ -14670,7 +14670,7 @@ dump_section_as_bytes (Elf_Internal_Shdr * section, real_start = start = (unsigned char *) get_section_contents (section, filedata); if (start == NULL) /* PR 21820: Do not fail if the section was empty. */ - return (section->sh_size == 0 || section->sh_type == SHT_NOBITS) ? TRUE : FALSE; + return section->sh_size == 0 || section->sh_type == SHT_NOBITS; section_size = section->sh_size; diff --git a/gas/ChangeLog b/gas/ChangeLog index ad1b751024a..4f773ca667e 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,25 @@ +2021-03-29 Alan Modra + + * atof-generic.c (FALSE, TRUE): Don't define. + * config/obj-elf.h (FALSE, TRUE): Don't define. + * config/obj-som.h (FALSE, TRUE): Don't define. + * config/tc-hppa.h (FALSE, TRUE): Don't define. + * config/tc-pdp11.c (FALSE, TRUE): Don't define. + * config/tc-iq2000.h (obj_fix_adjustable): Delete. + * config/tc-m32r.h (TC_FIX_ADJUSTABLE): Delete. + * config/tc-mt.h (obj_fix_adjustable): Delete. + * config/tc-nds32.h (TC_FIX_ADJUSTABLE): Delete. + * config/tc-arc.c (parse_opcode_flags): Simplify boolean expression. + (relaxable_flag, relaxable_operand, assemble_insn): Likewise. + (tokenize_extregister): Likewise. + * config/tc-csky.c (parse_opcode, get_operand_value): Likewise. + (parse_operands_op, parse_operands, md_assemble): Likewise. + * config/tc-d10v.c (build_insn): Likewise. + * config/tc-score.c (s3_gen_insn_frag): Likewise. + * config/tc-score7.c (s7_gen_insn_frag, s7_relax_frag): Likewise. + * config/tc-tic6x.c (tic6x_update_features, md_assemble): Likewise. + * config/tc-z80.c (emit_byte): Likewise. + 2021-03-29 Alan Modra * config/tc-arm.c (struct arm_long_option_table ): Return diff --git a/gas/atof-generic.c b/gas/atof-generic.c index 9a5b56781dd..d123f02108f 100644 --- a/gas/atof-generic.c +++ b/gas/atof-generic.c @@ -21,13 +21,6 @@ #include "as.h" #include "safe-ctype.h" -#ifndef FALSE -#define FALSE (0) -#endif -#ifndef TRUE -#define TRUE (1) -#endif - #ifdef TRACE static void flonum_print (const FLONUM_TYPE *); #endif diff --git a/gas/config/obj-elf.h b/gas/config/obj-elf.h index 50eb47554a8..c967db662a2 100644 --- a/gas/config/obj-elf.h +++ b/gas/config/obj-elf.h @@ -114,11 +114,6 @@ struct elf_section_match #define OBJ_SYMFIELD_TYPE struct elf_obj_sy -#ifndef FALSE -#define FALSE 0 -#define TRUE !FALSE -#endif - #ifndef obj_begin #define obj_begin() elf_begin () #endif diff --git a/gas/config/obj-som.h b/gas/config/obj-som.h index 762ee50c171..a2c53159e5e 100644 --- a/gas/config/obj-som.h +++ b/gas/config/obj-som.h @@ -30,11 +30,6 @@ #include "som/reloc.h" #include "targ-cpu.h" -#ifndef FALSE -#define FALSE 0 -#define TRUE !FALSE -#endif - /* should be conditional on address size! */ #define som_symbol(asymbol) ((som_symbol_type *) (&(asymbol)->the_bfd)) diff --git a/gas/config/tc-arc.c b/gas/config/tc-arc.c index 958eada844c..5b1c33ea3ea 100644 --- a/gas/config/tc-arc.c +++ b/gas/config/tc-arc.c @@ -1732,7 +1732,7 @@ parse_opcode_flags (const struct arc_opcode *opcode, } /* Did I check all the parsed flags? */ - return lnflg ? FALSE : TRUE; + return lnflg == 0; } @@ -3754,7 +3754,7 @@ relaxable_flag (const struct arc_relaxable_ins *ins, } /* If counttrue == nflgs, then all flags have been found. */ - return (counttrue == nflgs ? TRUE : FALSE); + return counttrue == nflgs; } /* Checks if operands are in line with relaxable insn. */ @@ -3831,7 +3831,7 @@ relaxable_operand (const struct arc_relaxable_ins *ins, operand = &ins->operands[i]; } - return (i == ntok ? TRUE : FALSE); + return i == ntok; } /* Return TRUE if this OPDCODE is a candidate for relaxation. */ @@ -4073,8 +4073,7 @@ assemble_insn (const struct arc_opcode *opcode, pcrel = reloc_howto->pc_relative; } fixup->pcrel = pcrel; - fixup->islong = (operand->flags & ARC_OPERAND_LIMM) ? - TRUE : FALSE; + fixup->islong = (operand->flags & ARC_OPERAND_LIMM) != 0; break; } } @@ -4675,9 +4674,8 @@ tokenize_extregister (extRegister_t *ereg, int opertype) char c; char *p; int number, imode = 0; - bfd_boolean isCore_p = (opertype == EXT_CORE_REGISTER) ? TRUE : FALSE; - bfd_boolean isReg_p = (opertype == EXT_CORE_REGISTER - || opertype == EXT_AUX_REGISTER) ? TRUE : FALSE; + bfd_boolean isCore_p = opertype == EXT_CORE_REGISTER; + bfd_boolean isReg_p = opertype == EXT_CORE_REGISTER || opertype == EXT_AUX_REGISTER; /* 1st: get register name. */ SKIP_WHITESPACE (); diff --git a/gas/config/tc-csky.c b/gas/config/tc-csky.c index 7a74eabca9c..583fb8b02ad 100644 --- a/gas/config/tc-csky.c +++ b/gas/config/tc-csky.c @@ -3314,7 +3314,7 @@ parse_opcode (char *str) { /* Is csky force 32 or 16 instruction? */ if (IS_CSKY_V2 (mach_flag) - && *opcode_end == '.' && has_suffix == FALSE) + && *opcode_end == '.' && !has_suffix) { has_suffix = TRUE; if (IS_OPCODE32F (opcode_end)) @@ -3334,7 +3334,7 @@ parse_opcode (char *str) } /* Is csky force 32 or 16 instruction? */ - if (has_suffix == FALSE) + if (!has_suffix) { if (IS_CSKY_V2 (mach_flag) && IS_OPCODE32F (opcode_end)) { @@ -3350,7 +3350,7 @@ parse_opcode (char *str) name[nlen] = '\0'; /* Generate macro_name for finding hash in macro hash_table. */ - if (has_suffix == TRUE) + if (has_suffix) nlen += 2; strncpy (macro_name, str, nlen); macro_name[nlen] = '\0'; @@ -3439,7 +3439,7 @@ get_operand_value (struct csky_opcode_info *op, return FALSE; } - if (get_operand_value (op, oper, &soprnd->subs[0]) == FALSE) + if (!get_operand_value (op, oper, &soprnd->subs[0])) { *s = rc; return FALSE; @@ -3452,7 +3452,7 @@ get_operand_value (struct csky_opcode_info *op, return FALSE; } - if (get_operand_value (op, oper, &soprnd->subs[1]) == FALSE) + if (!get_operand_value (op, oper, &soprnd->subs[1])) { *s = rc; return FALSE; @@ -3610,7 +3610,7 @@ get_operand_value (struct csky_opcode_info *op, int val = csky_insn.val[csky_insn.idx - 1]; log = csky_log_2 (val); csky_insn.val[csky_insn.idx - 1] = log; - return (log == -1 ? FALSE : TRUE); + return log != -1; } else return FALSE; @@ -3632,7 +3632,7 @@ get_operand_value (struct csky_opcode_info *op, } else csky_insn.val[csky_insn.idx - 1] = log; - return (log == -1 ? FALSE : TRUE); + return log != -1; } else return FALSE; @@ -3794,11 +3794,11 @@ get_operand_value (struct csky_opcode_info *op, else { csky_insn.val[csky_insn.idx] = 0; - if (is_psr_bit (oper) != FALSE) + if (is_psr_bit (oper)) while (**oper == ',') { *oper += 1; - if (is_psr_bit (oper) == FALSE) + if (!is_psr_bit (oper)) { ret = FALSE; break; @@ -3806,7 +3806,7 @@ get_operand_value (struct csky_opcode_info *op, } else ret = FALSE; - if (ret == TRUE && IS_CSKY_V1 (mach_flag) + if (ret && IS_CSKY_V1 (mach_flag) && csky_insn.val[csky_insn.idx] > 8) ret = FALSE; } @@ -4315,7 +4315,7 @@ parse_operands_op (char *str, struct csky_opcode_info *op) oper++; flag_pass = get_operand_value (&op[i], &oper, &op[i].oprnd.oprnds[j]); - if (flag_pass == FALSE) + if (!flag_pass) break; while (ISSPACE (*oper)) oper++; @@ -4342,7 +4342,7 @@ parse_operands_op (char *str, struct csky_opcode_info *op) } /* Parse operands in one table end. */ - if (flag_pass == TRUE) + if (flag_pass) { /* Parse operands success, set opcode_idx. */ csky_insn.opcode_idx = i; @@ -4366,7 +4366,7 @@ parse_operands (char *str) if (csky_insn.flag_force == INSN_OPCODE16F && (csky_insn.opcode->isa_flag16 & isa_flag) != 0) { - if (parse_operands_op (oper, csky_insn.opcode->op16) == TRUE) + if (parse_operands_op (oper, csky_insn.opcode->op16)) { csky_insn.isize = 2; return TRUE; @@ -4376,7 +4376,7 @@ parse_operands (char *str) else if (csky_insn.flag_force == INSN_OPCODE32F && (csky_insn.opcode->isa_flag32 & isa_flag) != 0) { - if (parse_operands_op (oper, csky_insn.opcode->op32) == TRUE) + if (parse_operands_op (oper, csky_insn.opcode->op32)) { csky_insn.isize = 4; return TRUE; @@ -4386,13 +4386,13 @@ parse_operands (char *str) else { if ((csky_insn.opcode->isa_flag16 & isa_flag) != 0 - && parse_operands_op (oper, csky_insn.opcode->op16) == TRUE) + && parse_operands_op (oper, csky_insn.opcode->op16)) { csky_insn.isize = 2; return TRUE; } if ((csky_insn.opcode->isa_flag32 & isa_flag) != 0 - && parse_operands_op (oper, csky_insn.opcode->op32) == TRUE) + && parse_operands_op (oper, csky_insn.opcode->op32)) { csky_insn.isize = 4; return TRUE; @@ -4559,7 +4559,7 @@ md_assemble (char *str) while (ISSPACE (* str)) str++; /* Get opcode from str. */ - if (parse_opcode (str) == FALSE) + if (!parse_opcode (str)) { csky_show_error (ERROR_OPCODE_ILLEGAL, 0, NULL, NULL); return; @@ -4586,7 +4586,7 @@ md_assemble (char *str) } /* Parse the operands according to operand type. */ - if (parse_operands (csky_insn.opcode_end) == FALSE) + if (!parse_operands (csky_insn.opcode_end)) { csky_show_error (error_state.err_num, error_state.opnum, (void *)error_state.arg1, (void *)error_state.arg1); @@ -4608,7 +4608,7 @@ md_assemble (char *str) } /* Adjust for xtrb0/xtrb1/xtrb2/xtrb3/divs/divu in csky v1 ISA. */ - if (mov_r1_after == TRUE) + if (mov_r1_after) { unsigned int mov_insn = CSKYV1_INST_MOV_RX_R1; mov_insn |= csky_insn.val[0]; @@ -4618,7 +4618,7 @@ md_assemble (char *str) md_number_to_chars (csky_insn.output, mov_insn, 2); csky_insn.isize += 2; } - if (mov_r1_before == TRUE) + if (mov_r1_before) csky_insn.isize += 2; /* Check literal. */ diff --git a/gas/config/tc-d10v.c b/gas/config/tc-d10v.c index d126927b6f1..547db0c1d9c 100644 --- a/gas/config/tc-d10v.c +++ b/gas/config/tc-d10v.c @@ -581,8 +581,7 @@ build_insn (struct d10v_opcode *opcode, fixups->fix[fixups->fc].exp = opers[i]; fixups->fix[fixups->fc].operand = opcode->operands[i]; - fixups->fix[fixups->fc].pcrel = - (flags & OPERAND_ADDR) ? TRUE : FALSE; + fixups->fix[fixups->fc].pcrel = (flags & OPERAND_ADDR) != 0; (fixups->fc)++; } diff --git a/gas/config/tc-hppa.h b/gas/config/tc-hppa.h index f620c8210c2..b4189918967 100644 --- a/gas/config/tc-hppa.h +++ b/gas/config/tc-hppa.h @@ -80,12 +80,6 @@ #define WARN_COMMENTS 1 #endif -/* FIXME. Why oh why aren't these defined somewhere globally? */ -#ifndef FALSE -#define FALSE (0) -#define TRUE (!FALSE) -#endif - #define ASEC_NULL (asection *)0 /* pa_define_label gets used outside of tc-hppa.c via tc_frob_label. */ diff --git a/gas/config/tc-iq2000.h b/gas/config/tc-iq2000.h index 940ffb46f89..5540f50f85a 100644 --- a/gas/config/tc-iq2000.h +++ b/gas/config/tc-iq2000.h @@ -45,8 +45,6 @@ #define tc_frob_file() iq2000_frob_file () -#define obj_fix_adjustable(fixP) iq2000_fix_adjustable (fixP) - /* After creating a fixup for an instruction operand, we need to check for HI16 relocs and queue them up for later sorting. */ #define md_cgen_record_fixup_exp iq2000_cgen_record_fixup_exp diff --git a/gas/config/tc-m32r.h b/gas/config/tc-m32r.h index 413b9275e7b..5ff14fbf2ae 100644 --- a/gas/config/tc-m32r.h +++ b/gas/config/tc-m32r.h @@ -70,7 +70,7 @@ extern void m32r_handle_align (fragS *); #define md_apply_fix gas_cgen_md_apply_fix #define tc_fix_adjustable(FIX) m32r_fix_adjustable (FIX) -bfd_boolean m32r_fix_adjustable (struct fix *); +extern bfd_boolean m32r_fix_adjustable (struct fix *); /* After creating a fixup for an instruction operand, we need to check for HI16 relocs and queue them up for later sorting. */ @@ -80,12 +80,6 @@ bfd_boolean m32r_fix_adjustable (struct fix *); extern int pic_code; -extern bfd_boolean m32r_fix_adjustable (struct fix *); - -/* This arranges for gas/write.c to not apply a relocation if - obj_fix_adjustable() says it is not adjustable. */ -#define TC_FIX_ADJUSTABLE(fixP) obj_fix_adjustable (fixP) - #define tc_frob_file_before_fix() m32r_frob_file () extern void m32r_frob_file (void); diff --git a/gas/config/tc-mt.h b/gas/config/tc-mt.h index dd8733fcfb2..fd1cb012225 100644 --- a/gas/config/tc-mt.h +++ b/gas/config/tc-mt.h @@ -49,9 +49,6 @@ extern void mt_apply_fix (struct fix *, valueT *, segT); /* Call md_pcrel_from_section(), not md_pcrel_from(). */ #define MD_PCREL_FROM_SECTION(FIXP, SEC) md_pcrel_from_section (FIXP, SEC) -#define obj_fix_adjustable(fixP) iq2000_fix_adjustable (fixP) -extern bfd_boolean mt_fix_adjustable (struct fix *); - /* Values passed to md_apply_fix don't include the symbol value. */ #define MD_APPLY_SYM_VALUE(FIX) 0 diff --git a/gas/config/tc-nds32.h b/gas/config/tc-nds32.h index c806de90c04..7dbeb591b58 100644 --- a/gas/config/tc-nds32.h +++ b/gas/config/tc-nds32.h @@ -214,9 +214,6 @@ extern int tc_nds32_regname_to_dw2regnum (char *); && S_IS_DEFINED ((FIX)->fx_addsy) \ && ! S_IS_COMMON ((FIX)->fx_addsy))) #define TC_HANDLES_FX_DONE -/* This arranges for gas/write.c to not apply a relocation if - obj_fix_adjustable() says it is not adjustable. */ -#define TC_FIX_ADJUSTABLE(fixP) obj_fix_adjustable (fixP) #endif /* Because linker may relax the code, assemble-time expression diff --git a/gas/config/tc-pdp11.c b/gas/config/tc-pdp11.c index 2b01fbc5836..b59db94e875 100644 --- a/gas/config/tc-pdp11.c +++ b/gas/config/tc-pdp11.c @@ -24,9 +24,6 @@ extern int flonum_gen2vax (int, FLONUM_TYPE * f, LITTLENUM_TYPE *); -#define TRUE 1 -#define FALSE 0 - /* A representation for PDP-11 machine code. */ struct pdp11_code { diff --git a/gas/config/tc-score.c b/gas/config/tc-score.c index b48fd7a5d8a..9e1798d96bc 100644 --- a/gas/config/tc-score.c +++ b/gas/config/tc-score.c @@ -2551,7 +2551,7 @@ s3_gen_insn_frag (struct s3_score_it *part_1, struct s3_score_it *part_2) struct s3_score_it *inst2 = part_2; struct s3_score_it backup_inst1; - pce_p = (inst2) ? TRUE : FALSE; + pce_p = inst2 != NULL; memcpy (&backup_inst1, inst1, sizeof (struct s3_score_it)); /* Adjust instruction opcode and to be relaxed instruction opcode. */ diff --git a/gas/config/tc-score7.c b/gas/config/tc-score7.c index b1194b3da00..c3feeaea5ce 100644 --- a/gas/config/tc-score7.c +++ b/gas/config/tc-score7.c @@ -2672,7 +2672,7 @@ s7_gen_insn_frag (struct s7_score_it *part_1, struct s7_score_it *part_2) struct s7_score_it *inst2 = part_2; struct s7_score_it backup_inst1; - pce_p = (inst2) ? TRUE : FALSE; + pce_p = inst2 != NULL; memcpy (&backup_inst1, inst1, sizeof (struct s7_score_it)); /* Adjust instruction opcode and to be relaxed instruction opcode. */ @@ -6355,7 +6355,7 @@ s7_relax_frag (asection * sec ATTRIBUTE_UNUSED, } } - word_align_p = ((fragp->fr_address + fragp->insn_addr) % 4 == 0) ? TRUE : FALSE; + word_align_p = (fragp->fr_address + fragp->insn_addr) % 4 == 0; /* Get instruction size and relax size after the last relaxation. */ if (fragp->fr_opcode) diff --git a/gas/config/tc-tic6x.c b/gas/config/tc-tic6x.c index e2304c58139..01600856634 100644 --- a/gas/config/tc-tic6x.c +++ b/gas/config/tc-tic6x.c @@ -350,16 +350,14 @@ tic6x_update_features (void) tic6x_num_registers = (tic6x_arch_enable & (TIC6X_INSN_C64X | TIC6X_INSN_C67XP)) ? 32 : 16; - tic6x_predicate_a0 = (tic6x_arch_enable & TIC6X_INSN_C64X) ? TRUE : FALSE; + tic6x_predicate_a0 = (tic6x_arch_enable & TIC6X_INSN_C64X) != 0; tic6x_can_cross_fp_boundary - = (tic6x_arch_enable - & (TIC6X_INSN_C64X | TIC6X_INSN_C67XP)) ? TRUE : FALSE; + = (tic6x_arch_enable & (TIC6X_INSN_C64X | TIC6X_INSN_C67XP)) != 0; - tic6x_long_data_constraints - = (tic6x_arch_enable & TIC6X_INSN_C64X) ? FALSE : TRUE; + tic6x_long_data_constraints = (tic6x_arch_enable & TIC6X_INSN_C64X) == 0; - tic6x_compact_insns = (tic6x_arch_enable & TIC6X_INSN_C64XP) ? TRUE : FALSE; + tic6x_compact_insns = (tic6x_arch_enable & TIC6X_INSN_C64XP) != 0; } /* Do configuration after all options have been parsed. */ @@ -3620,7 +3618,7 @@ md_assemble (char *str) seginfo->tc_segment_info_data.sploop_ii, &fix_exp, &fix_pcrel, &fx_r_type, &fix_adda, &fix_needed, &encoded_ok, - (try_rank == min_rank ? TRUE : FALSE), + try_rank == min_rank, str, opc_len); if (encoded_ok) { diff --git a/gas/config/tc-z80.c b/gas/config/tc-z80.c index cfb433f86c0..d4bbb56355b 100644 --- a/gas/config/tc-z80.c +++ b/gas/config/tc-z80.c @@ -1226,7 +1226,7 @@ emit_byte (expressionS * val, bfd_reloc_code_real_type r_type) { /* For symbols only, constants are stored at begin of function. */ fix_new_exp (frag_now, p - frag_now->fr_literal, 1, val, - (r_type == BFD_RELOC_8_PCREL) ? TRUE : FALSE, r_type); + r_type == BFD_RELOC_8_PCREL, r_type); } } diff --git a/include/ChangeLog b/include/ChangeLog index afc1ac95c1f..2bacadf01e2 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,9 @@ +2021-03-29 Alan Modra + + * opcode/aarch64.h (alias_opcode_p): Simplify boolean expression. + (opcode_has_alias, pseudo_opcode_p, optional_operand_p): Likewise. + (opcode_has_special_coder): Likewise. + 2021-03-29 Alan Modra * opcode/aarch64.h (aarch64_opcode_encode): Correct prototype. diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index dd4ab22f9ae..e48bea6db6e 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -900,13 +900,13 @@ extern aarch64_opcode aarch64_opcode_table[]; static inline bfd_boolean alias_opcode_p (const aarch64_opcode *opcode) { - return (opcode->flags & F_ALIAS) ? TRUE : FALSE; + return (opcode->flags & F_ALIAS) != 0; } static inline bfd_boolean opcode_has_alias (const aarch64_opcode *opcode) { - return (opcode->flags & F_HAS_ALIAS) ? TRUE : FALSE; + return (opcode->flags & F_HAS_ALIAS) != 0; } /* Priority for disassembling preference. */ @@ -919,14 +919,13 @@ opcode_priority (const aarch64_opcode *opcode) static inline bfd_boolean pseudo_opcode_p (const aarch64_opcode *opcode) { - return (opcode->flags & F_PSEUDO) != 0lu ? TRUE : FALSE; + return (opcode->flags & F_PSEUDO) != 0lu; } static inline bfd_boolean optional_operand_p (const aarch64_opcode *opcode, unsigned int idx) { - return (((opcode->flags >> 12) & 0x7) == idx + 1) - ? TRUE : FALSE; + return ((opcode->flags >> 12) & 0x7) == idx + 1; } static inline aarch64_insn @@ -945,8 +944,7 @@ static inline bfd_boolean opcode_has_special_coder (const aarch64_opcode *opcode) { return (opcode->flags & (F_SF | F_LSE_SZ | F_SIZEQ | F_FPTYPE | F_SSIZE | F_T - | F_GPRSIZE_IN_Q | F_LDS_SIZE | F_MISC | F_N | F_COND)) ? TRUE - : FALSE; + | F_GPRSIZE_IN_Q | F_LDS_SIZE | F_MISC | F_N | F_COND)) != 0; } struct aarch64_name_value_pair diff --git a/ld/ChangeLog b/ld/ChangeLog index c10bc392fd1..4b96e1a7b6d 100644 --- a/ld/ChangeLog +++ b/ld/ChangeLog @@ -1,3 +1,10 @@ +2021-03-29 Alan Modra + + * emultempl/aix.em (gld${EMULATION_NAME}_before_allocation): Simplify + boolean expression. + * lexsup.c (parse_args): Likewise. + * pe-dll.c (pe_dll_id_target): Likewise. + 2021-03-25 Nick Alcock * testsuite/ld-ctf/array.d: Only check that the data object diff --git a/ld/emultempl/aix.em b/ld/emultempl/aix.em index 6fd67b2b7f8..bea8c1d4dc5 100644 --- a/ld/emultempl/aix.em +++ b/ld/emultempl/aix.em @@ -834,9 +834,8 @@ gld${EMULATION_NAME}_before_allocation (void) /* Let the XCOFF backend set up the .loader section. */ if (!bfd_xcoff_size_dynamic_sections (link_info.output_bfd, &link_info, libpath, entry_symbol.name, file_align, - maxstack, maxdata, gc && !unix_ld ? TRUE : FALSE, - modtype, textro ? TRUE : FALSE, flags, special_sections, - rtld ? TRUE : FALSE)) + maxstack, maxdata, gc && !unix_ld, + modtype, textro, flags, special_sections, rtld)) einfo (_("%F%P: failed to set dynamic section sizes: %E\n")); /* Look through the special sections, and put them in the right diff --git a/ld/lexsup.c b/ld/lexsup.c index 88eb79e7f69..51b2a3ed263 100644 --- a/ld/lexsup.c +++ b/ld/lexsup.c @@ -1091,7 +1091,7 @@ parse_args (unsigned argc, char **argv) getopt can't handle two args to an option without kludges. */ /* Enable optimizations of output files. */ - link_info.optimize = strtoul (optarg, NULL, 0) ? TRUE : FALSE; + link_info.optimize = strtoul (optarg, NULL, 0) != 0; break; case 'o': lang_add_output (optarg, 0); diff --git a/ld/pe-dll.c b/ld/pe-dll.c index 154c6846beb..56b4375d8ce 100644 --- a/ld/pe-dll.c +++ b/ld/pe-dll.c @@ -439,7 +439,7 @@ pe_dll_id_target (const char *target) bfd_get_target_info (target, NULL, NULL, &u, NULL); if (u == -1) abort (); - pe_detail_list[i].underscored = (u != 0 ? TRUE : FALSE); + pe_detail_list[i].underscored = u != 0; pe_details = pe_detail_list + i; pe_leading_underscore = (u != 0 ? 1 : 0); return; diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 7a531b36a7b..ffe9337fd2d 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,24 @@ +2021-03-29 Alan Modra + + * aarch64-opc.c (vector_qualifier_p): Simplify boolean expression. + (fp_qualifier_p, get_data_pattern): Likewise. + (aarch64_get_operand_modifier_from_value): Likewise. + (aarch64_extend_operator_p, aarch64_shift_operator_p): Likewise. + (operand_variant_qualifier_p): Likewise. + (qualifier_value_in_range_constraint_p): Likewise. + (aarch64_get_qualifier_esize): Likewise. + (aarch64_get_qualifier_nelem): Likewise. + (aarch64_get_qualifier_standard_value): Likewise. + (get_lower_bound, get_upper_bound): Likewise. + (aarch64_find_best_match, match_operands_qualifier): Likewise. + (aarch64_print_operand): Likewise. + * aarch64-opc.h (operand_has_inserter, operand_has_extractor): Likewise. + (operand_need_sign_extension, operand_need_shift_by_two): Likewise. + (operand_need_shift_by_four, operand_maybe_stack_pointer): Likewise. + * arm-dis.c (print_insn_mve, print_insn_thumb32): Likewise. + * tic6x-dis.c (tic6x_check_fetch_packet_header): Likewise. + (print_insn_tic6x): Likewise. + 2021-03-29 Alan Modra * arc-dis.c (extract_operand_value): Correct NULL cast. diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 521ec6f9c82..c4397bc4301 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -105,17 +105,15 @@ const char *const aarch64_sve_prfop_array[16] = { static inline bfd_boolean vector_qualifier_p (enum aarch64_opnd_qualifier qualifier) { - return ((qualifier >= AARCH64_OPND_QLF_V_8B - && qualifier <= AARCH64_OPND_QLF_V_1Q) ? TRUE - : FALSE); + return (qualifier >= AARCH64_OPND_QLF_V_8B + && qualifier <= AARCH64_OPND_QLF_V_1Q); } static inline bfd_boolean fp_qualifier_p (enum aarch64_opnd_qualifier qualifier) { - return ((qualifier >= AARCH64_OPND_QLF_S_B - && qualifier <= AARCH64_OPND_QLF_S_Q) ? TRUE - : FALSE); + return (qualifier >= AARCH64_OPND_QLF_S_B + && qualifier <= AARCH64_OPND_QLF_S_Q); } enum data_pattern @@ -144,12 +142,12 @@ static const char significant_operand_index [] = static enum data_pattern get_data_pattern (const aarch64_opnd_qualifier_seq_t qualifiers) { - if (vector_qualifier_p (qualifiers[0]) == TRUE) + if (vector_qualifier_p (qualifiers[0])) { /* e.g. v.4s, v.4s, v.4s or v.4h, v.4h, v.h[3]. */ if (qualifiers[0] == qualifiers[1] - && vector_qualifier_p (qualifiers[2]) == TRUE + && vector_qualifier_p (qualifiers[2]) && (aarch64_get_qualifier_esize (qualifiers[0]) == aarch64_get_qualifier_esize (qualifiers[1])) && (aarch64_get_qualifier_esize (qualifiers[0]) @@ -158,14 +156,14 @@ get_data_pattern (const aarch64_opnd_qualifier_seq_t qualifiers) /* e.g. v.8h, v.8b, v.8b. or v.4s, v.4h, v.h[2]. or v.8h, v.16b. */ - if (vector_qualifier_p (qualifiers[1]) == TRUE + if (vector_qualifier_p (qualifiers[1]) && aarch64_get_qualifier_esize (qualifiers[0]) != 0 && (aarch64_get_qualifier_esize (qualifiers[0]) == aarch64_get_qualifier_esize (qualifiers[1]) << 1)) return DP_VECTOR_LONG; /* e.g. v.8h, v.8h, v.8b. */ if (qualifiers[0] == qualifiers[1] - && vector_qualifier_p (qualifiers[2]) == TRUE + && vector_qualifier_p (qualifiers[2]) && aarch64_get_qualifier_esize (qualifiers[0]) != 0 && (aarch64_get_qualifier_esize (qualifiers[0]) == aarch64_get_qualifier_esize (qualifiers[2]) << 1) @@ -173,10 +171,10 @@ get_data_pattern (const aarch64_opnd_qualifier_seq_t qualifiers) == aarch64_get_qualifier_esize (qualifiers[1]))) return DP_VECTOR_WIDE; } - else if (fp_qualifier_p (qualifiers[0]) == TRUE) + else if (fp_qualifier_p (qualifiers[0])) { /* e.g. SADDLV , .. */ - if (vector_qualifier_p (qualifiers[1]) == TRUE + if (vector_qualifier_p (qualifiers[1]) && qualifiers[2] == AARCH64_OPND_QLF_NIL) return DP_VECTOR_ACROSS_LANES; } @@ -427,7 +425,7 @@ enum aarch64_modifier_kind aarch64_get_operand_modifier_from_value (aarch64_insn value, bfd_boolean extend_p) { - if (extend_p == TRUE) + if (extend_p) return AARCH64_MOD_UXTB + value; else return AARCH64_MOD_LSL - value; @@ -436,15 +434,13 @@ aarch64_get_operand_modifier_from_value (aarch64_insn value, bfd_boolean aarch64_extend_operator_p (enum aarch64_modifier_kind kind) { - return (kind > AARCH64_MOD_LSL && kind <= AARCH64_MOD_SXTX) - ? TRUE : FALSE; + return kind > AARCH64_MOD_LSL && kind <= AARCH64_MOD_SXTX; } static inline bfd_boolean aarch64_shift_operator_p (enum aarch64_modifier_kind kind) { - return (kind >= AARCH64_MOD_ROR && kind <= AARCH64_MOD_LSL) - ? TRUE : FALSE; + return kind >= AARCH64_MOD_ROR && kind <= AARCH64_MOD_LSL; } const struct aarch64_name_value_pair aarch64_barrier_options[16] = @@ -767,15 +763,13 @@ struct operand_qualifier_data aarch64_opnd_qualifiers[] = static inline bfd_boolean operand_variant_qualifier_p (aarch64_opnd_qualifier_t qualifier) { - return (aarch64_opnd_qualifiers[qualifier].kind == OQK_OPD_VARIANT) - ? TRUE : FALSE; + return aarch64_opnd_qualifiers[qualifier].kind == OQK_OPD_VARIANT; } static inline bfd_boolean qualifier_value_in_range_constraint_p (aarch64_opnd_qualifier_t qualifier) { - return (aarch64_opnd_qualifiers[qualifier].kind == OQK_VALUE_IN_RANGE) - ? TRUE : FALSE; + return aarch64_opnd_qualifiers[qualifier].kind == OQK_VALUE_IN_RANGE; } const char* @@ -789,35 +783,35 @@ aarch64_get_qualifier_name (aarch64_opnd_qualifier_t qualifier) unsigned char aarch64_get_qualifier_esize (aarch64_opnd_qualifier_t qualifier) { - assert (operand_variant_qualifier_p (qualifier) == TRUE); + assert (operand_variant_qualifier_p (qualifier)); return aarch64_opnd_qualifiers[qualifier].data0; } unsigned char aarch64_get_qualifier_nelem (aarch64_opnd_qualifier_t qualifier) { - assert (operand_variant_qualifier_p (qualifier) == TRUE); + assert (operand_variant_qualifier_p (qualifier)); return aarch64_opnd_qualifiers[qualifier].data1; } aarch64_insn aarch64_get_qualifier_standard_value (aarch64_opnd_qualifier_t qualifier) { - assert (operand_variant_qualifier_p (qualifier) == TRUE); + assert (operand_variant_qualifier_p (qualifier)); return aarch64_opnd_qualifiers[qualifier].data2; } static int get_lower_bound (aarch64_opnd_qualifier_t qualifier) { - assert (qualifier_value_in_range_constraint_p (qualifier) == TRUE); + assert (qualifier_value_in_range_constraint_p (qualifier)); return aarch64_opnd_qualifiers[qualifier].data0; } static int get_upper_bound (aarch64_opnd_qualifier_t qualifier) { - assert (qualifier_value_in_range_constraint_p (qualifier) == TRUE); + assert (qualifier_value_in_range_constraint_p (qualifier)); return aarch64_opnd_qualifiers[qualifier].data1; } @@ -951,7 +945,7 @@ aarch64_find_best_match (const aarch64_inst *inst, /* Most opcodes has much fewer patterns in the list. First NIL qualifier indicates the end in the list. */ - if (empty_qualifier_sequence_p (qualifiers) == TRUE) + if (empty_qualifier_sequence_p (qualifiers)) { DEBUG_TRACE_IF (i == 0, "SUCCEED: empty qualifier list"); if (i) @@ -1023,7 +1017,7 @@ aarch64_find_best_match (const aarch64_inst *inst, Return 1 if the operand qualifier(s) in *INST match one of the qualifier sequences in INST->OPCODE->qualifiers_list; otherwise return 0. - if UPDATE_P == TRUE, update the qualifier(s) in *INST after the matching + if UPDATE_P, update the qualifier(s) in *INST after the matching succeeds. */ static int @@ -1049,7 +1043,7 @@ match_operands_qualifier (aarch64_inst *inst, bfd_boolean update_p) } /* Update the qualifiers. */ - if (update_p == TRUE) + if (update_p) for (i = 0; i < AARCH64_MAX_OPND_NUM; ++i) { if (inst->opcode->operands[i] == AARCH64_OPND_NIL) @@ -3539,7 +3533,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc, case AARCH64_OPND_UIMM4_ADDG: case AARCH64_OPND_UIMM7: case AARCH64_OPND_UIMM10: - if (optional_operand_p (opcode, idx) == TRUE + if (optional_operand_p (opcode, idx) && (opnd->imm.value == (int64_t) get_optional_operand_default_value (opcode))) /* Omit the operand, e.g. DCPS1. */ diff --git a/opcodes/aarch64-opc.h b/opcodes/aarch64-opc.h index 5366e9da957..82f64c2a751 100644 --- a/opcodes/aarch64-opc.h +++ b/opcodes/aarch64-opc.h @@ -245,37 +245,37 @@ verify_constraints (const struct aarch64_inst *, const aarch64_insn, bfd_vma, static inline bfd_boolean operand_has_inserter (const aarch64_operand *operand) { - return (operand->flags & OPD_F_HAS_INSERTER) ? TRUE : FALSE; + return (operand->flags & OPD_F_HAS_INSERTER) != 0; } static inline bfd_boolean operand_has_extractor (const aarch64_operand *operand) { - return (operand->flags & OPD_F_HAS_EXTRACTOR) ? TRUE : FALSE; + return (operand->flags & OPD_F_HAS_EXTRACTOR) != 0; } static inline bfd_boolean operand_need_sign_extension (const aarch64_operand *operand) { - return (operand->flags & OPD_F_SEXT) ? TRUE : FALSE; + return (operand->flags & OPD_F_SEXT) != 0; } static inline bfd_boolean operand_need_shift_by_two (const aarch64_operand *operand) { - return (operand->flags & OPD_F_SHIFT_BY_2) ? TRUE : FALSE; + return (operand->flags & OPD_F_SHIFT_BY_2) != 0; } static inline bfd_boolean operand_need_shift_by_four (const aarch64_operand *operand) { - return (operand->flags & OPD_F_SHIFT_BY_4) ? TRUE : FALSE; + return (operand->flags & OPD_F_SHIFT_BY_4) != 0; } static inline bfd_boolean operand_maybe_stack_pointer (const aarch64_operand *operand) { - return (operand->flags & OPD_F_MAYBE_SP) ? TRUE : FALSE; + return (operand->flags & OPD_F_MAYBE_SP) != 0; } /* Return the value of the operand-specific data field (OPD_F_OD_MASK). */ diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 9647d0019db..2f3f19ba1cb 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -9887,11 +9887,11 @@ print_insn_mve (struct disassemble_info *info, long given) if (is_undefined) print_mve_undefined (info, undefined_cond); - if ((vpt_block_state.in_vpt_block == FALSE) + if (!vpt_block_state.in_vpt_block && !ifthen_state - && (is_vpt_instruction (given) == TRUE)) + && is_vpt_instruction (given)) mark_inside_vpt_block (given); - else if (vpt_block_state.in_vpt_block == TRUE) + else if (vpt_block_state.in_vpt_block) update_vpt_block_state (); return TRUE; @@ -10841,7 +10841,7 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given) if (print_insn_coprocessor (pc, info, given, TRUE)) return; - if ((is_mve == FALSE) && print_insn_neon (info, given, TRUE)) + if (!is_mve && print_insn_neon (info, given, TRUE)) return; if (is_mve && print_insn_mve (info, given)) diff --git a/opcodes/tic6x-dis.c b/opcodes/tic6x-dis.c index 53d11a22a78..3b5eea17d02 100644 --- a/opcodes/tic6x-dis.c +++ b/opcodes/tic6x-dis.c @@ -214,17 +214,16 @@ tic6x_check_fetch_packet_header (unsigned char *fp, for (i = 0; i < 7; i++) header->word_compact[i] - = (header->header & (1u << (21 + i))) ? TRUE : FALSE; + = (header->header & (1u << (21 + i))) != 0; - header->prot = (header->header & (1u << 20)) ? TRUE : FALSE; - header->rs = (header->header & (1u << 19)) ? TRUE : FALSE; + header->prot = (header->header & (1u << 20)) != 0; + header->rs = (header->header & (1u << 19)) != 0; header->dsz = (header->header >> 16) & 0x7; - header->br = (header->header & (1u << 15)) ? TRUE : FALSE; - header->sat = (header->header & (1u << 14)) ? TRUE : FALSE; + header->br = (header->header & (1u << 15)) != 0; + header->sat = (header->header & (1u << 14)) != 0; for (i = 0; i < 14; i++) - header->p_bits[i] - = (header->header & (1u << i)) ? TRUE : FALSE; + header->p_bits[i] = (header->header & (1u << i)) != 0; return TRUE; } @@ -490,7 +489,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) { unsigned int prev_opcode = tic6x_extract_32 (fp + (fp_offset & 0x1c) - 4, info); - p_bit = (prev_opcode & 0x1) ? TRUE : FALSE; + p_bit = (prev_opcode & 0x1) != 0; } } else @@ -518,14 +517,14 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) { unsigned int prev_opcode = tic6x_extract_32 (fp_prev + 24, info); - p_bit = (prev_opcode & 0x1) ? TRUE : FALSE; + p_bit = (prev_opcode & 0x1) != 0; } } else { unsigned int prev_opcode = tic6x_extract_32 (fp_prev + 28, info); - p_bit = (prev_opcode & 0x1) ? TRUE : FALSE; + p_bit = (prev_opcode & 0x1) != 0; } } } @@ -654,7 +653,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) printf ("opcode %x: illegal cross path specifier in adda opcode!\n", opcode); abort (); } - func_unit_cross = (func_unit_side == 1 ? TRUE : FALSE); + func_unit_cross = func_unit_side == 1; } switch (opc->func_unit) @@ -1344,7 +1343,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) side = func_unit_side == 2 ? 'b' : 'a'; snprintf (base, 4, "%c%u", side, mem_base_reg); - offset_is_reg = ((mem_mode & 4) ? TRUE : FALSE); + offset_is_reg = (mem_mode & 4) != 0; if (offset_is_reg) { @@ -1355,7 +1354,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) snprintf (offset, 4, "%c%u", side, reg_base + mem_offset); if (opc->operand_info[op_num].form == tic6x_operand_mem_ndw) - offset_scaled = mem_scaled ? TRUE : FALSE; + offset_scaled = mem_scaled != 0; else offset_scaled = TRUE; } @@ -1364,7 +1363,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) if (opc->operand_info[op_num].form == tic6x_operand_mem_ndw) { - offset_scaled = mem_scaled ? TRUE : FALSE; + offset_scaled = mem_scaled != 0; snprintf (offset, 4, "%u", mem_offset); } else -- 2.30.2