From 63b84f56fce3a40c9488453490429a3d5ac64641 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Wed, 11 Mar 2020 17:10:35 +0000 Subject: [PATCH] dewildcardify unitsg --- src/soc/minerva/units/adder.py | 2 +- src/soc/minerva/units/compare.py | 2 +- src/soc/minerva/units/decoder.py | 2 +- src/soc/minerva/units/divider.py | 2 +- src/soc/minerva/units/exception.py | 9 ++++++--- 5 files changed, 10 insertions(+), 7 deletions(-) diff --git a/src/soc/minerva/units/adder.py b/src/soc/minerva/units/adder.py index 2971d984..eabdc6c2 100644 --- a/src/soc/minerva/units/adder.py +++ b/src/soc/minerva/units/adder.py @@ -1,4 +1,4 @@ -from nmigen import * +from nmigen import Elaboratable, Module, Signal, Cat __all__ = ["Adder"] diff --git a/src/soc/minerva/units/compare.py b/src/soc/minerva/units/compare.py index b11cdfe1..b8ba2171 100644 --- a/src/soc/minerva/units/compare.py +++ b/src/soc/minerva/units/compare.py @@ -1,4 +1,4 @@ -from nmigen import * +from nmigen import Elaboratable, Module, Signal from ..isa import Funct3 diff --git a/src/soc/minerva/units/decoder.py b/src/soc/minerva/units/decoder.py index 0c75d503..7975d2d6 100644 --- a/src/soc/minerva/units/decoder.py +++ b/src/soc/minerva/units/decoder.py @@ -2,7 +2,7 @@ from functools import reduce from itertools import starmap from operator import or_ -from nmigen import * +from nmigen import Elaboratable, Module, Signal, Cat from ..isa import Opcode, Funct3, Funct7, Funct12 diff --git a/src/soc/minerva/units/divider.py b/src/soc/minerva/units/divider.py index 6a98927c..fcc0a795 100644 --- a/src/soc/minerva/units/divider.py +++ b/src/soc/minerva/units/divider.py @@ -1,4 +1,4 @@ -from nmigen import * +from nmigen import Elaboratable, Signal, Mux, Cat from ..isa import Funct3 diff --git a/src/soc/minerva/units/exception.py b/src/soc/minerva/units/exception.py index 0d66b47e..1bee8402 100644 --- a/src/soc/minerva/units/exception.py +++ b/src/soc/minerva/units/exception.py @@ -1,8 +1,11 @@ -from nmigen import * +from nmigen import Elaboratable, Module, Signal from nmigen.lib.coding import PriorityEncoder -from ..csr import * -from ..isa import * +from ..csr import AutoCSR, CSR +from ..isa import (Cause, + mstatus_layout, misa_layout, mie_layout, + mtvec_layout, flat_layout, mepc_layout, mcause_layout, + flat_layout, mip_layout, flat_layout) __all__ = ["ExceptionUnit"] -- 2.30.2