From 63c94110082000071c57b5835d3a69a027ac1d5c Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Wed, 20 Apr 2022 19:56:18 +0100
Subject: [PATCH]

---
 openpower/sv/biginteger.mdwn | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/openpower/sv/biginteger.mdwn b/openpower/sv/biginteger.mdwn
index a1be1ccb3..ec4b4636c 100644
--- a/openpower/sv/biginteger.mdwn
+++ b/openpower/sv/biginteger.mdwn
@@ -191,7 +191,8 @@ used with the additional bit set for determining RS.
 | EXTRA2_MODE   | `18`    | used by `msubed` and `madded` for RS   |
 
 When `EXTRA2_MODE` is set to zero, the implicit RS register takes
-its Vector/Scalar setting from Rdest_EXTRA2, but all numbering
+its Vector/Scalar setting from Rdest_EXTRA2, and takes
+the register number from RT, but all numbering
 is offset by VL. *Note that element-width overrides influence this
 offset* (see SVP64 [[svp64/appendix]] for full details).
 
-- 
2.30.2