From 64788b2e8dc2ddedc2712ed02b7e9096638b7bae Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Fri, 19 Sep 2014 10:10:13 +0100 Subject: [PATCH] i965: Throttle to the previous frame MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit In order to facilitate the concurrency offered by triple buffering and to offset the latency induced by swapping via an external process, which may incur extra rendering itself, only throttle to the previous frame and not the last. The second issue that mostly affects swap benchmarks, but also can incur jitter in the throttling, is that the throttle bo is closer to the next SwapBuffers rather than immediately after the previous SwapBuffers. Throttling to the previous frame doubles the maximum possible latency at the benefit of improving throughput and reducing jitter. v2: Rename "first_post_swapbuffer" batches array to a plain throttle_batch[] as the pluralisation was contorting the name and not making it clear as to whether it was the first batch or first_post_swap batch. Not least of which was that not all throttle points are SwapBuffers. Signed-off-by: Chris Wilson Cc: Daniel Vetter Cc: Kenneth Graunke Cc: Ben Widawsky Cc: Kristian Høgsberg Cc: Chad Versace Cc: Ian Romanick Reviewed-by: Chad Versace --- src/mesa/drivers/dri/i965/brw_context.c | 19 ++++++++++++------- src/mesa/drivers/dri/i965/brw_context.h | 2 +- src/mesa/drivers/dri/i965/intel_batchbuffer.c | 7 ++++--- 3 files changed, 17 insertions(+), 11 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 51203726438..8257fb60043 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -935,8 +935,10 @@ intelDestroyContext(__DRIcontext * driContextPriv) intel_batchbuffer_free(brw); - drm_intel_bo_unreference(brw->first_post_swapbuffers_batch); - brw->first_post_swapbuffers_batch = NULL; + drm_intel_bo_unreference(brw->throttle_batch[1]); + drm_intel_bo_unreference(brw->throttle_batch[0]); + brw->throttle_batch[1] = NULL; + brw->throttle_batch[0] = NULL; driDestroyOptionCache(&brw->optionCache); @@ -1245,11 +1247,14 @@ intel_prepare_render(struct brw_context *brw) * the swap, and getting our hands on that doesn't seem worth it, * so we just us the first batch we emitted after the last swap. */ - if (brw->need_swap_throttle && brw->first_post_swapbuffers_batch) { - if (!brw->disable_throttling) - drm_intel_bo_wait_rendering(brw->first_post_swapbuffers_batch); - drm_intel_bo_unreference(brw->first_post_swapbuffers_batch); - brw->first_post_swapbuffers_batch = NULL; + if (brw->need_swap_throttle && brw->throttle_batch[0]) { + if (brw->throttle_batch[1]) { + if (!brw->disable_throttling) + drm_intel_bo_wait_rendering(brw->throttle_batch[1]); + drm_intel_bo_unreference(brw->throttle_batch[1]); + } + brw->throttle_batch[1] = brw->throttle_batch[0]; + brw->throttle_batch[0] = NULL; brw->need_swap_throttle = false; /* Throttling here is more precise than the throttle ioctl, so skip it */ brw->need_flush_throttle = false; diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index eebd7cec72e..8b29e2ab4c8 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -1030,7 +1030,7 @@ struct brw_context bool front_buffer_dirty; /** Framerate throttling: @{ */ - drm_intel_bo *first_post_swapbuffers_batch; + drm_intel_bo *throttle_batch[2]; /* Limit the number of outstanding SwapBuffers by waiting for an earlier * frame of rendering to complete. This gives a very precise cap to the diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c index 5ac4d180a2e..87862cd492c 100644 --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c +++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c @@ -168,6 +168,7 @@ static void brw_new_batch(struct brw_context *brw) { /* Create a new batchbuffer and reset the associated state: */ + drm_intel_gem_bo_clear_relocs(brw->batch.bo, 0); intel_batchbuffer_reset(brw); /* If the kernel supports hardware contexts, then most hardware state is @@ -289,9 +290,9 @@ _intel_batchbuffer_flush(struct brw_context *brw, if (brw->batch.used == 0) return 0; - if (brw->first_post_swapbuffers_batch == NULL) { - brw->first_post_swapbuffers_batch = brw->batch.bo; - drm_intel_bo_reference(brw->first_post_swapbuffers_batch); + if (brw->throttle_batch[0] == NULL) { + brw->throttle_batch[0] = brw->batch.bo; + drm_intel_bo_reference(brw->throttle_batch[0]); } if (unlikely(INTEL_DEBUG & DEBUG_BATCH)) { -- 2.30.2