From 649625bb8e871ba65ad97b9bc7323b488739d466 Mon Sep 17 00:00:00 2001 From: Jeff Law Date: Wed, 2 Jul 1997 18:29:16 +0000 Subject: [PATCH] * gencode.c (build_instruction): Handle "ppac5" according to version 1.95 of the r5900 ISA. fixes pr12407 (c/h from toshiba). --- sim/mips/ChangeLog | 5 +++++ sim/mips/gencode.c | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index ded2cf3105a..27a002710e9 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,5 +1,10 @@ Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com) +start-sanitize-r5900 + * gencode.c (build_instruction): Handle "ppac5" according to + version 1.95 of the r5900 ISA. +end-sanitize-r5900 + * interp.c (sim_engine_run): Reset the ZERO register to zero regardless of FEATURE_WARN_ZERO. * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO. diff --git a/sim/mips/gencode.c b/sim/mips/gencode.c index c877e5c82d9..fbe9c524d42 100644 --- a/sim/mips/gencode.c +++ b/sim/mips/gencode.c @@ -3994,7 +3994,7 @@ build_instruction (doisa, features, mips16, insn) printf("for(i=0;i> (24 - 15)) \n"); + printf(" GPR_UW(destreg,i) = ((x & (1 << 31)) >> (31 - 15)) \n"); printf(" | ((x & (31 << 19)) >> (19 - 10)) \n"); printf(" | ((x & (31 << 11)) >> (11 - 5)) \n"); printf(" | ((x & (31 << 3)) >> (3 - 0)); \n"); -- 2.30.2