From 654e950cba55dabd2d9accb60db8e5f4c1495716 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Kristian=20H=C3=B8gsberg=20Kristensen?= Date: Sun, 1 May 2016 21:22:54 -0700 Subject: [PATCH] i965: Invoke lowering pass for YUV textures Reviewed-by: Jordan Justen --- src/mesa/drivers/dri/i965/brw_compiler.h | 7 ++++++ src/mesa/drivers/dri/i965/brw_nir.c | 4 +++ src/mesa/drivers/dri/i965/brw_wm.c | 28 +++++++++++++++++++++ src/mesa/drivers/dri/i965/intel_tex_image.c | 3 +++ src/mesa/drivers/dri/i965/intel_tex_obj.h | 2 ++ 5 files changed, 44 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_compiler.h b/src/mesa/drivers/dri/i965/brw_compiler.h index 731c5d5ce2b..a8fb4864e6e 100644 --- a/src/mesa/drivers/dri/i965/brw_compiler.h +++ b/src/mesa/drivers/dri/i965/brw_compiler.h @@ -159,6 +159,13 @@ struct brw_sampler_prog_key_data { * For Sandybridge, which shader w/a we need for gather quirks. */ enum gen6_gather_sampler_wa gen6_gather_wa[MAX_SAMPLERS]; + + /** + * Texture units that have a YUV image bound. + */ + uint32_t y_u_v_image_mask; + uint32_t y_uv_image_mask; + uint32_t yx_xuxv_image_mask; }; diff --git a/src/mesa/drivers/dri/i965/brw_nir.c b/src/mesa/drivers/dri/i965/brw_nir.c index 9274f2e1616..66de93018b6 100644 --- a/src/mesa/drivers/dri/i965/brw_nir.c +++ b/src/mesa/drivers/dri/i965/brw_nir.c @@ -627,6 +627,10 @@ brw_nir_apply_sampler_key(nir_shader *nir, tex_options.swizzles[s][c] = GET_SWZ(key_tex->swizzles[s], c); } + tex_options.lower_y_uv_external = key_tex->y_uv_image_mask; + tex_options.lower_y_u_v_external = key_tex->y_u_v_image_mask; + tex_options.lower_yx_xuxv_external = key_tex->yx_xuxv_image_mask; + if (nir_lower_tex(nir, &tex_options)) { nir_validate_shader(nir); nir = nir_optimize(nir, is_scalar); diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index 81a61c94880..1943d08ab66 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -35,6 +35,7 @@ #include "program/prog_parameter.h" #include "program/program.h" #include "intel_mipmap_tree.h" +#include "intel_image.h" #include "brw_nir.h" #include "brw_program.h" @@ -207,6 +208,16 @@ brw_debug_recompile_sampler_key(struct brw_context *brw, old_key->msaa_16, key->msaa_16); + found |= key_debug(brw, "y_uv image bound", + old_key->y_uv_image_mask, + key->y_uv_image_mask); + found |= key_debug(brw, "y_u_v image bound", + old_key->y_u_v_image_mask, + key->y_u_v_image_mask); + found |= key_debug(brw, "yx_xuxv image bound", + old_key->yx_xuxv_image_mask, + key->yx_xuxv_image_mask); + for (unsigned int i = 0; i < MAX_SAMPLERS; i++) { found |= key_debug(brw, "textureGather workarounds", old_key->gen6_gather_wa[i], key->gen6_gather_wa[i]); @@ -371,6 +382,23 @@ brw_populate_sampler_prog_key_data(struct gl_context *ctx, key->msaa_16 |= 1 << s; } } + + if (t->Target == GL_TEXTURE_EXTERNAL_OES && intel_tex->planar_format) { + switch (intel_tex->planar_format->components) { + case __DRI_IMAGE_COMPONENTS_Y_UV: + key->y_uv_image_mask |= 1 << s; + break; + case __DRI_IMAGE_COMPONENTS_Y_U_V: + key->y_u_v_image_mask |= 1 << s; + break; + case __DRI_IMAGE_COMPONENTS_Y_XUXV: + key->yx_xuxv_image_mask |= 1 << s; + break; + default: + break; + } + } + } } } diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c index 095b94b3e81..9cc426c7e9d 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_image.c +++ b/src/mesa/drivers/dri/i965/intel_tex_image.c @@ -396,6 +396,9 @@ intel_image_target_texture_2d(struct gl_context *ctx, GLenum target, if (mt == NULL) return; + struct intel_texture_object *intel_texobj = intel_texture_object(texObj); + intel_texobj->planar_format = image->planar_format; + intel_set_texture_image_mt(brw, texImage, mt); intel_miptree_release(&mt); } diff --git a/src/mesa/drivers/dri/i965/intel_tex_obj.h b/src/mesa/drivers/dri/i965/intel_tex_obj.h index 750e4c33529..844aad1ab30 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_obj.h +++ b/src/mesa/drivers/dri/i965/intel_tex_obj.h @@ -58,6 +58,8 @@ struct intel_texture_object * since the mt is shared across views with differing formats. */ mesa_format _Format; + + const struct intel_image_format *planar_format; }; -- 2.30.2