From 6565924d84ca2e25cf56f856cba0c79e02c2eca5 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 21 May 2022 15:55:48 +0100 Subject: [PATCH] --- openpower/sv/biginteger.mdwn | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/openpower/sv/biginteger.mdwn b/openpower/sv/biginteger.mdwn index aaa4253e7..b122c428a 100644 --- a/openpower/sv/biginteger.mdwn +++ b/openpower/sv/biginteger.mdwn @@ -74,7 +74,9 @@ To achieve the same big-integer rolling-accumulation effect as SVP64, instructions may be issued `madded r20,r4,r8,r20 madded r21,r5,r9,r21` etc. where the first `madded` will have stored the upper half of the 128-bit multiply into r21, such -that it may be picked up by the second `madded`.* +that it may be picked up by the second `madded`. Repeat inline +to construct a larger bigint scalar-vector multiply, +as Scalar GPR register file space permits.* SVP64 overrides the Scalar behaviour of what defines RS. For SVP64 EXTRA register extension, the `RM-1P-3S-1D` format is -- 2.30.2