From 65bbd5fa2af803dc3f5923f97a27887bfd79d385 Mon Sep 17 00:00:00 2001 From: Hoa Nguyen Date: Thu, 14 Jan 2021 04:10:48 -0800 Subject: [PATCH] cpu: Add Units to cpu stats Change-Id: I387b2e9f6ecf62757242056f732bd443c457ebea Signed-off-by: Hoa Nguyen Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39095 Tested-by: kokoro Reviewed-by: Bobby R. Bruce Maintainer: Bobby R. Bruce --- src/cpu/base.cc | 20 ++++--- src/cpu/kvm/base.cc | 27 ++++----- src/cpu/minor/fetch2.cc | 24 ++++---- src/cpu/minor/stats.cc | 19 +++--- src/cpu/o3/commit.hh | 2 +- src/cpu/o3/commit_impl.hh | 55 ++++++++++-------- src/cpu/o3/cpu.cc | 52 ++++++++++------- src/cpu/o3/decode_impl.hh | 33 ++++++----- src/cpu/o3/fetch_impl.hh | 52 +++++++++-------- src/cpu/o3/iew_impl.hh | 72 +++++++++++++---------- src/cpu/o3/inst_queue_impl.hh | 84 ++++++++++++++++----------- src/cpu/o3/lsq_unit_impl.hh | 25 ++++---- src/cpu/o3/mem_dep_unit_impl.hh | 8 +-- src/cpu/o3/probe/elastic_trace.cc | 40 +++++++------ src/cpu/o3/rename_impl.hh | 78 +++++++++++++------------ src/cpu/o3/rob_impl.hh | 4 +- src/cpu/pred/bpred_unit.cc | 31 +++++----- src/cpu/pred/loop_predictor.cc | 10 ++-- src/cpu/pred/statistical_corrector.cc | 10 ++-- src/cpu/pred/tage_base.cc | 59 ++++++++++--------- src/cpu/simple/exec_context.hh | 79 ++++++++++++++----------- src/cpu/testers/memtest/memtest.cc | 4 +- src/cpu/testers/traffic_gen/base.cc | 40 +++++++------ src/cpu/thread_state.cc | 6 +- src/cpu/trace/trace_cpu.cc | 59 +++++++++++-------- 25 files changed, 506 insertions(+), 387 deletions(-) diff --git a/src/cpu/base.cc b/src/cpu/base.cc index 793fc64c0..f98837c81 100644 --- a/src/cpu/base.cc +++ b/src/cpu/base.cc @@ -370,9 +370,10 @@ BaseCPU::probeInstCommit(const StaticInstPtr &inst, Addr pc) BaseCPU:: BaseCPUStats::BaseCPUStats(Stats::Group *parent) : Stats::Group(parent), - ADD_STAT(numCycles, "Number of cpu cycles simulated"), - ADD_STAT(numWorkItemsStarted, "Number of work items this cpu started"), - ADD_STAT(numWorkItemsCompleted, + ADD_STAT(numCycles, UNIT_CYCLE, "Number of cpu cycles simulated"), + ADD_STAT(numWorkItemsStarted, UNIT_COUNT, + "Number of work items this cpu started"), + ADD_STAT(numWorkItemsCompleted, UNIT_COUNT, "Number of work items this cpu completed") { } @@ -732,10 +733,15 @@ BaseCPU::waitForRemoteGDB() const BaseCPU::GlobalStats::GlobalStats(::Stats::Group *parent) : ::Stats::Group(parent), - ADD_STAT(simInsts, "Number of instructions simulated"), - ADD_STAT(simOps, "Number of ops (including micro ops) simulated"), - ADD_STAT(hostInstRate, "Simulator instruction rate (inst/s)"), - ADD_STAT(hostOpRate, "Simulator op (including micro ops) rate (op/s)") + ADD_STAT(simInsts, UNIT_COUNT, "Number of instructions simulated"), + ADD_STAT(simOps, UNIT_COUNT, + "Number of ops (including micro ops) simulated"), + ADD_STAT(hostInstRate, + UNIT_RATE(Stats::Units::Count, Stats::Units::Second), + "Simulator instruction rate (inst/s)"), + ADD_STAT(hostOpRate, + UNIT_RATE(Stats::Units::Count, Stats::Units::Second), + "Simulator op (including micro ops) rate (op/s)") { simInsts .functor(BaseCPU::numSimulatedInsts) diff --git a/src/cpu/kvm/base.cc b/src/cpu/kvm/base.cc index aac6aaf7d..7b523a422 100644 --- a/src/cpu/kvm/base.cc +++ b/src/cpu/kvm/base.cc @@ -260,19 +260,20 @@ BaseKvmCPU::startupThread() BaseKvmCPU::StatGroup::StatGroup(Stats::Group *parent) : Stats::Group(parent), - ADD_STAT(committedInsts, "Number of instructions committed"), - ADD_STAT(numVMExits, "total number of KVM exits"), - ADD_STAT(numVMHalfEntries, - "number of KVM entries to finalize pending operations"), - ADD_STAT(numExitSignal, "exits due to signal delivery"), - ADD_STAT(numMMIO, "number of VM exits due to memory mapped IO"), - ADD_STAT(numCoalescedMMIO, - "number of coalesced memory mapped IO requests"), - ADD_STAT(numIO, "number of VM exits due to legacy IO"), - ADD_STAT(numHalt, - "number of VM exits due to wait for interrupt instructions"), - ADD_STAT(numInterrupts, "number of interrupts delivered"), - ADD_STAT(numHypercalls, "number of hypercalls") + ADD_STAT(committedInsts, UNIT_COUNT, "Number of instructions committed"), + ADD_STAT(numVMExits, UNIT_COUNT, "total number of KVM exits"), + ADD_STAT(numVMHalfEntries, UNIT_COUNT, + "number of KVM entries to finalize pending operations"), + ADD_STAT(numExitSignal, UNIT_COUNT, "exits due to signal delivery"), + ADD_STAT(numMMIO, UNIT_COUNT, + "number of VM exits due to memory mapped IO"), + ADD_STAT(numCoalescedMMIO, UNIT_COUNT, + "number of coalesced memory mapped IO requests"), + ADD_STAT(numIO, UNIT_COUNT, "number of VM exits due to legacy IO"), + ADD_STAT(numHalt, UNIT_COUNT, + "number of VM exits due to wait for interrupt instructions"), + ADD_STAT(numInterrupts, UNIT_COUNT, "number of interrupts delivered"), + ADD_STAT(numHypercalls, UNIT_COUNT, "number of hypercalls") { } diff --git a/src/cpu/minor/fetch2.cc b/src/cpu/minor/fetch2.cc index 648ac6d0a..c8901bd9d 100644 --- a/src/cpu/minor/fetch2.cc +++ b/src/cpu/minor/fetch2.cc @@ -607,18 +607,18 @@ Fetch2::isDrained() Fetch2::Fetch2Stats::Fetch2Stats(MinorCPU *cpu) : Stats::Group(cpu, "fetch2"), - ADD_STAT(intInstructions, - "Number of integer instructions successfully decoded"), - ADD_STAT(fpInstructions, - "Number of floating point instructions successfully decoded"), - ADD_STAT(vecInstructions, - "Number of SIMD instructions successfully decoded"), - ADD_STAT(loadInstructions, - "Number of memory load instructions successfully decoded"), - ADD_STAT(storeInstructions, - "Number of memory store instructions successfully decoded"), - ADD_STAT(amoInstructions, - "Number of memory atomic instructions successfully decoded") + ADD_STAT(intInstructions, UNIT_COUNT, + "Number of integer instructions successfully decoded"), + ADD_STAT(fpInstructions, UNIT_COUNT, + "Number of floating point instructions successfully decoded"), + ADD_STAT(vecInstructions, UNIT_COUNT, + "Number of SIMD instructions successfully decoded"), + ADD_STAT(loadInstructions, UNIT_COUNT, + "Number of memory load instructions successfully decoded"), + ADD_STAT(storeInstructions, UNIT_COUNT, + "Number of memory store instructions successfully decoded"), + ADD_STAT(amoInstructions, UNIT_COUNT, + "Number of memory atomic instructions successfully decoded") { intInstructions .flags(Stats::total); diff --git a/src/cpu/minor/stats.cc b/src/cpu/minor/stats.cc index cf28b0f06..8c29cd441 100644 --- a/src/cpu/minor/stats.cc +++ b/src/cpu/minor/stats.cc @@ -42,19 +42,22 @@ namespace Minor MinorStats::MinorStats(BaseCPU *base_cpu) : Stats::Group(base_cpu), - ADD_STAT(numInsts, "Number of instructions committed"), - ADD_STAT(numOps, "Number of ops (including micro ops) committed"), - ADD_STAT(numDiscardedOps, + ADD_STAT(numInsts, UNIT_COUNT, "Number of instructions committed"), + ADD_STAT(numOps, UNIT_COUNT, + "Number of ops (including micro ops) committed"), + ADD_STAT(numDiscardedOps, UNIT_COUNT, "Number of ops (including micro ops) which were discarded before " "commit"), - ADD_STAT(numFetchSuspends, + ADD_STAT(numFetchSuspends, UNIT_COUNT, "Number of times Execute suspended instruction fetching"), - ADD_STAT(quiesceCycles, + ADD_STAT(quiesceCycles, UNIT_CYCLE, "Total number of cycles that CPU has spent quiesced or waiting " "for an interrupt"), - ADD_STAT(cpi, "CPI: cycles per instruction"), - ADD_STAT(ipc, "IPC: instructions per cycle"), - ADD_STAT(committedInstType, "Class of committed instruction") + ADD_STAT(cpi, UNIT_RATE(Stats::Units::Cycle, Stats::Units::Count), + "CPI: cycles per instruction"), + ADD_STAT(ipc, UNIT_RATE(Stats::Units::Count, Stats::Units::Cycle), + "IPC: instructions per cycle"), + ADD_STAT(committedInstType, UNIT_COUNT, "Class of committed instruction") { quiesceCycles.prereq(quiesceCycles); diff --git a/src/cpu/o3/commit.hh b/src/cpu/o3/commit.hh index 58ca7d7af..92e87a29a 100644 --- a/src/cpu/o3/commit.hh +++ b/src/cpu/o3/commit.hh @@ -512,7 +512,7 @@ class DefaultCommit /** Total number of committed branches. */ Stats::Vector branches; /** Total number of vector instructions */ - Stats::Vector vector; + Stats::Vector vectorInstructions; /** Total number of floating point instructions */ Stats::Vector floating; /** Total number of integer instructions */ diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh index d90d0fdc8..4eae36544 100644 --- a/src/cpu/o3/commit_impl.hh +++ b/src/cpu/o3/commit_impl.hh @@ -147,28 +147,35 @@ template DefaultCommit::CommitStats::CommitStats(O3CPU *cpu, DefaultCommit *commit) : Stats::Group(cpu, "commit"), - ADD_STAT(commitSquashedInsts, "The number of squashed insts skipped by" - " commit"), - ADD_STAT(commitNonSpecStalls, "The number of times commit has been" - " forced to stall to communicate backwards"), - ADD_STAT(branchMispredicts, "The number of times a branch was" - " mispredicted"), - ADD_STAT(numCommittedDist, "Number of insts commited each cycle"), - ADD_STAT(instsCommitted, "Number of instructions committed"), - ADD_STAT(opsCommitted, "Number of ops (including micro ops) committed"), - ADD_STAT(memRefs, "Number of memory references committed"), - ADD_STAT(loads, "Number of loads committed"), - ADD_STAT(amos, "Number of atomic instructions committed"), - ADD_STAT(membars, "Number of memory barriers committed"), - ADD_STAT(branches, "Number of branches committed"), - ADD_STAT(vector, "Number of committed Vector instructions."), - ADD_STAT(floating, "Number of committed floating point" - " instructions."), - ADD_STAT(integer, "Number of committed integer instructions."), - ADD_STAT(functionCalls, "Number of function calls committed."), - ADD_STAT(committedInstType, "Class of committed instruction"), - ADD_STAT(commitEligibleSamples, "number cycles where commit BW limit" - " reached") + ADD_STAT(commitSquashedInsts, UNIT_COUNT, + "The number of squashed insts skipped by commit"), + ADD_STAT(commitNonSpecStalls, UNIT_COUNT, + "The number of times commit has been forced to stall to " + "communicate backwards"), + ADD_STAT(branchMispredicts, UNIT_COUNT, + "The number of times a branch was mispredicted"), + ADD_STAT(numCommittedDist, UNIT_COUNT, + "Number of insts commited each cycle"), + ADD_STAT(instsCommitted, UNIT_COUNT, "Number of instructions committed"), + ADD_STAT(opsCommitted, UNIT_COUNT, + "Number of ops (including micro ops) committed"), + ADD_STAT(memRefs, UNIT_COUNT, "Number of memory references committed"), + ADD_STAT(loads, UNIT_COUNT, "Number of loads committed"), + ADD_STAT(amos, UNIT_COUNT, "Number of atomic instructions committed"), + ADD_STAT(membars, UNIT_COUNT, "Number of memory barriers committed"), + ADD_STAT(branches, UNIT_COUNT, "Number of branches committed"), + ADD_STAT(vectorInstructions, UNIT_COUNT, + "Number of committed Vector instructions."), + ADD_STAT(floating, UNIT_COUNT, + "Number of committed floating point instructions."), + ADD_STAT(integer, UNIT_COUNT, + "Number of committed integer instructions."), + ADD_STAT(functionCalls, UNIT_COUNT, + "Number of function calls committed."), + ADD_STAT(committedInstType, UNIT_COUNT, + "Class of committed instruction"), + ADD_STAT(commitEligibleSamples, UNIT_CYCLE, + "number cycles where commit BW limit reached") { using namespace Stats; @@ -208,7 +215,7 @@ DefaultCommit::CommitStats::CommitStats(O3CPU *cpu, .init(cpu->numThreads) .flags(total); - vector + vectorInstructions .init(cpu->numThreads) .flags(total); @@ -1473,7 +1480,7 @@ DefaultCommit::updateComInstStats(const DynInstPtr &inst) stats.floating[tid]++; // Vector Instruction if (inst->isVector()) - stats.vector[tid]++; + stats.vectorInstructions[tid]++; // Function Calls if (inst->isCall()) diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index ca22155e2..3b9f99195 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -378,33 +378,43 @@ template FullO3CPU:: FullO3CPUStats::FullO3CPUStats(FullO3CPU *cpu) : Stats::Group(cpu), - ADD_STAT(timesIdled, + ADD_STAT(timesIdled, UNIT_COUNT, "Number of times that the entire CPU went into an idle state " "and unscheduled itself"), - ADD_STAT(idleCycles, + ADD_STAT(idleCycles, UNIT_CYCLE, "Total number of cycles that the CPU has spent unscheduled due " "to idling"), - ADD_STAT(quiesceCycles, + ADD_STAT(quiesceCycles, UNIT_CYCLE, "Total number of cycles that CPU has spent quiesced or waiting " "for an interrupt"), - ADD_STAT(committedInsts, "Number of Instructions Simulated"), - ADD_STAT(committedOps, "Number of Ops (including micro ops) Simulated"), - ADD_STAT(cpi, "CPI: Cycles Per Instruction"), - ADD_STAT(totalCpi, "CPI: Total CPI of All Threads"), - ADD_STAT(ipc, "IPC: Instructions Per Cycle"), - ADD_STAT(totalIpc, "IPC: Total IPC of All Threads"), - ADD_STAT(intRegfileReads, "Number of integer regfile reads"), - ADD_STAT(intRegfileWrites, "Number of integer regfile writes"), - ADD_STAT(fpRegfileReads, "Number of floating regfile reads"), - ADD_STAT(fpRegfileWrites, "Number of floating regfile writes"), - ADD_STAT(vecRegfileReads, "number of vector regfile reads"), - ADD_STAT(vecRegfileWrites, "number of vector regfile writes"), - ADD_STAT(vecPredRegfileReads, "number of predicate regfile reads"), - ADD_STAT(vecPredRegfileWrites, "number of predicate regfile writes"), - ADD_STAT(ccRegfileReads, "number of cc regfile reads"), - ADD_STAT(ccRegfileWrites, "number of cc regfile writes"), - ADD_STAT(miscRegfileReads, "number of misc regfile reads"), - ADD_STAT(miscRegfileWrites, "number of misc regfile writes") + ADD_STAT(committedInsts, UNIT_COUNT, "Number of Instructions Simulated"), + ADD_STAT(committedOps, UNIT_COUNT, + "Number of Ops (including micro ops) Simulated"), + ADD_STAT(cpi, UNIT_RATE(Stats::Units::Cycle, Stats::Units::Count), + "CPI: Cycles Per Instruction"), + ADD_STAT(totalCpi, UNIT_RATE(Stats::Units::Cycle, Stats::Units::Count), + "CPI: Total CPI of All Threads"), + ADD_STAT(ipc, UNIT_RATE(Stats::Units::Count, Stats::Units::Cycle), + "IPC: Instructions Per Cycle"), + ADD_STAT(totalIpc, UNIT_RATE(Stats::Units::Count, Stats::Units::Cycle), + "IPC: Total IPC of All Threads"), + ADD_STAT(intRegfileReads, UNIT_COUNT, "Number of integer regfile reads"), + ADD_STAT(intRegfileWrites, UNIT_COUNT, + "Number of integer regfile writes"), + ADD_STAT(fpRegfileReads, UNIT_COUNT, "Number of floating regfile reads"), + ADD_STAT(fpRegfileWrites, UNIT_COUNT, + "Number of floating regfile writes"), + ADD_STAT(vecRegfileReads, UNIT_COUNT, "number of vector regfile reads"), + ADD_STAT(vecRegfileWrites, UNIT_COUNT, + "number of vector regfile writes"), + ADD_STAT(vecPredRegfileReads, UNIT_COUNT, + "number of predicate regfile reads"), + ADD_STAT(vecPredRegfileWrites, UNIT_COUNT, + "number of predicate regfile writes"), + ADD_STAT(ccRegfileReads, UNIT_COUNT, "number of cc regfile reads"), + ADD_STAT(ccRegfileWrites, UNIT_COUNT, "number of cc regfile writes"), + ADD_STAT(miscRegfileReads, UNIT_COUNT, "number of misc regfile reads"), + ADD_STAT(miscRegfileWrites, UNIT_COUNT, "number of misc regfile writes") { // Register any of the O3CPU's stats here. timesIdled diff --git a/src/cpu/o3/decode_impl.hh b/src/cpu/o3/decode_impl.hh index 76cc2cf10..9c55cb293 100644 --- a/src/cpu/o3/decode_impl.hh +++ b/src/cpu/o3/decode_impl.hh @@ -122,20 +122,25 @@ DefaultDecode::name() const template DefaultDecode::DecodeStats::DecodeStats(O3CPU *cpu) : Stats::Group(cpu, "decode"), - ADD_STAT(idleCycles, "Number of cycles decode is idle"), - ADD_STAT(blockedCycles, "Number of cycles decode is blocked"), - ADD_STAT(runCycles, "Number of cycles decode is running"), - ADD_STAT(unblockCycles, "Number of cycles decode is unblocking"), - ADD_STAT(squashCycles, "Number of cycles decode is squashing"), - ADD_STAT(branchResolved, "Number of times decode resolved a " - " branch"), - ADD_STAT(branchMispred, "Number of times decode detected a branch" - " misprediction"), - ADD_STAT(controlMispred,"Number of times decode detected an" - " instruction incorrectly predicted as a control"), - ADD_STAT(decodedInsts, "Number of instructions handled by decode"), - ADD_STAT(squashedInsts, "Number of squashed instructions handled" - " by decode") + ADD_STAT(idleCycles, UNIT_CYCLE, "Number of cycles decode is idle"), + ADD_STAT(blockedCycles, UNIT_CYCLE, + "Number of cycles decode is blocked"), + ADD_STAT(runCycles, UNIT_CYCLE, "Number of cycles decode is running"), + ADD_STAT(unblockCycles, UNIT_CYCLE, + "Number of cycles decode is unblocking"), + ADD_STAT(squashCycles, UNIT_CYCLE, + "Number of cycles decode is squashing"), + ADD_STAT(branchResolved, UNIT_COUNT, + "Number of times decode resolved a branch"), + ADD_STAT(branchMispred, UNIT_COUNT, + "Number of times decode detected a branch misprediction"), + ADD_STAT(controlMispred, UNIT_COUNT, + "Number of times decode detected an instruction incorrectly " + "predicted as a control"), + ADD_STAT(decodedInsts, UNIT_COUNT, + "Number of instructions handled by decode"), + ADD_STAT(squashedInsts, UNIT_COUNT, + "Number of squashed instructions handled by decode") { idleCycles.prereq(idleCycles); blockedCycles.prereq(blockedCycles); diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh index 24e746433..7c54509cd 100644 --- a/src/cpu/o3/fetch_impl.hh +++ b/src/cpu/o3/fetch_impl.hh @@ -159,45 +159,49 @@ template DefaultFetch:: FetchStatGroup::FetchStatGroup(O3CPU *cpu, DefaultFetch *fetch) : Stats::Group(cpu, "fetch"), - ADD_STAT(icacheStallCycles, + ADD_STAT(icacheStallCycles, UNIT_CYCLE, "Number of cycles fetch is stalled on an Icache miss"), - ADD_STAT(insts, "Number of instructions fetch has processed"), - ADD_STAT(branches, "Number of branches that fetch encountered"), - ADD_STAT(predictedBranches, + ADD_STAT(insts, UNIT_COUNT, "Number of instructions fetch has processed"), + ADD_STAT(branches, UNIT_COUNT, + "Number of branches that fetch encountered"), + ADD_STAT(predictedBranches, UNIT_COUNT, "Number of branches that fetch has predicted taken"), - ADD_STAT(cycles, + ADD_STAT(cycles, UNIT_CYCLE, "Number of cycles fetch has run and was not squashing or " "blocked"), - ADD_STAT(squashCycles, "Number of cycles fetch has spent squashing"), - ADD_STAT(tlbCycles, + ADD_STAT(squashCycles, UNIT_CYCLE, + "Number of cycles fetch has spent squashing"), + ADD_STAT(tlbCycles, UNIT_CYCLE, "Number of cycles fetch has spent waiting for tlb"), - ADD_STAT(idleCycles, "Number of cycles fetch was idle"), - ADD_STAT(blockedCycles, "Number of cycles fetch has spent blocked"), - ADD_STAT(miscStallCycles, - "Number of cycles fetch has spent waiting on interrupts, " - "or bad addresses, or out of MSHRs"), - ADD_STAT(pendingDrainCycles, + ADD_STAT(idleCycles, UNIT_CYCLE, "Number of cycles fetch was idle"), + ADD_STAT(blockedCycles, UNIT_CYCLE, + "Number of cycles fetch has spent blocked"), + ADD_STAT(miscStallCycles, UNIT_CYCLE, + "Number of cycles fetch has spent waiting on interrupts, or bad " + "addresses, or out of MSHRs"), + ADD_STAT(pendingDrainCycles, UNIT_CYCLE, "Number of cycles fetch has spent waiting on pipes to drain"), - ADD_STAT(noActiveThreadStallCycles, + ADD_STAT(noActiveThreadStallCycles, UNIT_CYCLE, "Number of stall cycles due to no active thread to fetch from"), - ADD_STAT(pendingTrapStallCycles, + ADD_STAT(pendingTrapStallCycles, UNIT_CYCLE, "Number of stall cycles due to pending traps"), - ADD_STAT(pendingQuiesceStallCycles, + ADD_STAT(pendingQuiesceStallCycles, UNIT_CYCLE, "Number of stall cycles due to pending quiesce instructions"), - ADD_STAT(icacheWaitRetryStallCycles, + ADD_STAT(icacheWaitRetryStallCycles, UNIT_CYCLE, "Number of stall cycles due to full MSHR"), - ADD_STAT(cacheLines, "Number of cache lines fetched"), - ADD_STAT(icacheSquashes, + ADD_STAT(cacheLines, UNIT_COUNT, "Number of cache lines fetched"), + ADD_STAT(icacheSquashes, UNIT_COUNT, "Number of outstanding Icache misses that were squashed"), - ADD_STAT(tlbSquashes, + ADD_STAT(tlbSquashes, UNIT_COUNT, "Number of outstanding ITLB misses that were squashed"), - ADD_STAT(nisnDist, + ADD_STAT(nisnDist, UNIT_COUNT, "Number of instructions fetched each cycle (Total)"), - ADD_STAT(idleRate, "Ratio of cycles fetch was idle", + ADD_STAT(idleRate, UNIT_RATIO, "Ratio of cycles fetch was idle", idleCycles / cpu->baseStats.numCycles), - ADD_STAT(branchRate, "Number of branch fetches per cycle", + ADD_STAT(branchRate, UNIT_RATIO, "Number of branch fetches per cycle", branches / cpu->baseStats.numCycles), - ADD_STAT(rate, "Number of inst fetches per cycle", + ADD_STAT(rate, UNIT_RATE(Stats::Units::Count, Stats::Units::Cycle), + "Number of inst fetches per cycle", insts / cpu->baseStats.numCycles) { icacheStallCycles diff --git a/src/cpu/o3/iew_impl.hh b/src/cpu/o3/iew_impl.hh index e3757c15e..fe5005595 100644 --- a/src/cpu/o3/iew_impl.hh +++ b/src/cpu/o3/iew_impl.hh @@ -142,36 +142,46 @@ template DefaultIEW:: IEWStats::IEWStats(O3CPU *cpu) : Stats::Group(cpu), - ADD_STAT(idleCycles, "Number of cycles IEW is idle"), - ADD_STAT(squashCycles, "Number of cycles IEW is squashing"), - ADD_STAT(blockCycles, "Number of cycles IEW is blocking"), - ADD_STAT(unblockCycles, "Number of cycles IEW is unblocking"), - ADD_STAT(dispatchedInsts, "Number of instructions dispatched to IQ"), - ADD_STAT(dispSquashedInsts, + ADD_STAT(idleCycles, UNIT_CYCLE, "Number of cycles IEW is idle"), + ADD_STAT(squashCycles, UNIT_CYCLE, "Number of cycles IEW is squashing"), + ADD_STAT(blockCycles, UNIT_CYCLE, "Number of cycles IEW is blocking"), + ADD_STAT(unblockCycles, UNIT_CYCLE, "Number of cycles IEW is unblocking"), + ADD_STAT(dispatchedInsts, UNIT_COUNT, + "Number of instructions dispatched to IQ"), + ADD_STAT(dispSquashedInsts, UNIT_COUNT, "Number of squashed instructions skipped by dispatch"), - ADD_STAT(dispLoadInsts, "Number of dispatched load instructions"), - ADD_STAT(dispStoreInsts, "Number of dispatched store instructions"), - ADD_STAT(dispNonSpecInsts, + ADD_STAT(dispLoadInsts, UNIT_COUNT, + "Number of dispatched load instructions"), + ADD_STAT(dispStoreInsts, UNIT_COUNT, + "Number of dispatched store instructions"), + ADD_STAT(dispNonSpecInsts, UNIT_COUNT, "Number of dispatched non-speculative instructions"), - ADD_STAT(iqFullEvents, + ADD_STAT(iqFullEvents, UNIT_COUNT, "Number of times the IQ has become full, causing a stall"), - ADD_STAT(lsqFullEvents, + ADD_STAT(lsqFullEvents, UNIT_COUNT, "Number of times the LSQ has become full, causing a stall"), - ADD_STAT(memOrderViolationEvents, "Number of memory order violations"), - ADD_STAT(predictedTakenIncorrect, + ADD_STAT(memOrderViolationEvents, UNIT_COUNT, + "Number of memory order violations"), + ADD_STAT(predictedTakenIncorrect, UNIT_COUNT, "Number of branches that were predicted taken incorrectly"), - ADD_STAT(predictedNotTakenIncorrect, + ADD_STAT(predictedNotTakenIncorrect, UNIT_COUNT, "Number of branches that were predicted not taken incorrectly"), - ADD_STAT(branchMispredicts, + ADD_STAT(branchMispredicts, UNIT_COUNT, "Number of branch mispredicts detected at execute", predictedTakenIncorrect + predictedNotTakenIncorrect), executedInstStats(cpu), - ADD_STAT(instsToCommit, "Cumulative count of insts sent to commit"), - ADD_STAT(writebackCount, "Cumulative count of insts written-back"), - ADD_STAT(producerInst, "Number of instructions producing a value"), - ADD_STAT(consumerInst, "Number of instructions consuming a value"), - ADD_STAT(wbRate, "Insts written-back per cycle"), - ADD_STAT(wbFanout, "Average fanout of values written-back") + ADD_STAT(instsToCommit, UNIT_COUNT, + "Cumulative count of insts sent to commit"), + ADD_STAT(writebackCount, UNIT_COUNT, + "Cumulative count of insts written-back"), + ADD_STAT(producerInst, UNIT_COUNT, + "Number of instructions producing a value"), + ADD_STAT(consumerInst, UNIT_COUNT, + "Number of instructions consuming a value"), + ADD_STAT(wbRate, UNIT_RATE(Stats::Units::Count, Stats::Units::Cycle), + "Insts written-back per cycle"), + ADD_STAT(wbFanout, UNIT_RATE(Stats::Units::Count, Stats::Units::Count), + "Average fanout of values written-back") { instsToCommit .init(cpu->numThreads) @@ -202,17 +212,17 @@ template DefaultIEW::IEWStats:: ExecutedInstStats::ExecutedInstStats(O3CPU *cpu) : Stats::Group(cpu), - ADD_STAT(numInsts, "Number of executed instructions"), - ADD_STAT(numLoadInsts, "Number of load instructions executed"), - ADD_STAT(numSquashedInsts, + ADD_STAT(numInsts, UNIT_COUNT, "Number of executed instructions"), + ADD_STAT(numLoadInsts, UNIT_COUNT, "Number of load instructions executed"), + ADD_STAT(numSquashedInsts, UNIT_COUNT, "Number of squashed instructions skipped in execute"), - ADD_STAT(numSwp, "Number of swp insts executed"), - ADD_STAT(numNop, "Number of nop insts executed"), - ADD_STAT(numRefs, "Number of memory reference insts executed"), - ADD_STAT(numBranches, "Number of branches executed"), - ADD_STAT(numStoreInsts, "Number of stores executed"), - ADD_STAT(numRate, "Inst execution rate", - numInsts / cpu->baseStats.numCycles) + ADD_STAT(numSwp, UNIT_COUNT, "Number of swp insts executed"), + ADD_STAT(numNop, UNIT_COUNT, "Number of nop insts executed"), + ADD_STAT(numRefs, UNIT_COUNT, "Number of memory reference insts executed"), + ADD_STAT(numBranches, UNIT_COUNT, "Number of branches executed"), + ADD_STAT(numStoreInsts, UNIT_COUNT, "Number of stores executed"), + ADD_STAT(numRate, UNIT_RATE(Stats::Units::Count, Stats::Units::Cycle), + "Inst execution rate", numInsts / cpu->baseStats.numCycles) { numLoadInsts .init(cpu->numThreads) diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh index 24871d989..84725978a 100644 --- a/src/cpu/o3/inst_queue_impl.hh +++ b/src/cpu/o3/inst_queue_impl.hh @@ -177,32 +177,41 @@ template InstructionQueue:: IQStats::IQStats(O3CPU *cpu, const unsigned &total_width) : Stats::Group(cpu), - ADD_STAT(instsAdded, + ADD_STAT(instsAdded, UNIT_COUNT, "Number of instructions added to the IQ (excludes non-spec)"), - ADD_STAT(nonSpecInstsAdded, + ADD_STAT(nonSpecInstsAdded, UNIT_COUNT, "Number of non-speculative instructions added to the IQ"), - ADD_STAT(instsIssued, "Number of instructions issued"), - ADD_STAT(intInstsIssued, "Number of integer instructions issued"), - ADD_STAT(floatInstsIssued, "Number of float instructions issued"), - ADD_STAT(branchInstsIssued, "Number of branch instructions issued"), - ADD_STAT(memInstsIssued, "Number of memory instructions issued"), - ADD_STAT(miscInstsIssued, "Number of miscellaneous instructions issued"), - ADD_STAT(squashedInstsIssued, "Number of squashed instructions issued"), - ADD_STAT(squashedInstsExamined, + ADD_STAT(instsIssued, UNIT_COUNT, "Number of instructions issued"), + ADD_STAT(intInstsIssued, UNIT_COUNT, + "Number of integer instructions issued"), + ADD_STAT(floatInstsIssued, UNIT_COUNT, + "Number of float instructions issued"), + ADD_STAT(branchInstsIssued, UNIT_COUNT, + "Number of branch instructions issued"), + ADD_STAT(memInstsIssued, UNIT_COUNT, + "Number of memory instructions issued"), + ADD_STAT(miscInstsIssued, UNIT_COUNT, + "Number of miscellaneous instructions issued"), + ADD_STAT(squashedInstsIssued, UNIT_COUNT, + "Number of squashed instructions issued"), + ADD_STAT(squashedInstsExamined, UNIT_COUNT, "Number of squashed instructions iterated over during squash; " "mainly for profiling"), - ADD_STAT(squashedOperandsExamined, + ADD_STAT(squashedOperandsExamined, UNIT_COUNT, "Number of squashed operands that are examined and possibly " "removed from graph"), - ADD_STAT(squashedNonSpecRemoved, + ADD_STAT(squashedNonSpecRemoved, UNIT_COUNT, "Number of squashed non-spec instructions that were removed"), - ADD_STAT(numIssuedDist, "Number of insts issued each cycle"), - ADD_STAT(statFuBusy, "attempts to use FU when none available"), - ADD_STAT(statIssuedInstType, "Type of FU issued"), - ADD_STAT(issueRate, "Inst issue rate", - instsIssued / cpu->baseStats.numCycles), - ADD_STAT(fuBusy, "FU busy when requested"), - ADD_STAT(fuBusyRate, "FU busy rate (busy events/executed inst)") + ADD_STAT(numIssuedDist, UNIT_COUNT, "Number of insts issued each cycle"), + ADD_STAT(statFuBusy, UNIT_COUNT, + "attempts to use FU when none available"), + ADD_STAT(statIssuedInstType, UNIT_COUNT, + "Number of instructions issued per FU type, per thread"), + ADD_STAT(issueRate, UNIT_RATE(Stats::Units::Count, Stats::Units::Cycle), + "Inst issue rate", instsIssued / cpu->baseStats.numCycles), + ADD_STAT(fuBusy, UNIT_COUNT, "FU busy when requested"), + ADD_STAT(fuBusyRate, UNIT_RATE(Stats::Units::Count, Stats::Units::Count), + "FU busy rate (busy events/executed inst)") { instsAdded .prereq(instsAdded); @@ -314,21 +323,28 @@ template InstructionQueue:: IQIOStats::IQIOStats(Stats::Group *parent) : Stats::Group(parent), - ADD_STAT(intInstQueueReads, "Number of integer instruction queue reads"), - ADD_STAT(intInstQueueWrites, "Number of integer instruction queue writes"), - ADD_STAT(intInstQueueWakeupAccesses, "Number of integer instruction queue " - "wakeup accesses"), - ADD_STAT(fpInstQueueReads, "Number of floating instruction queue reads"), - ADD_STAT(fpInstQueueWrites, "Number of floating instruction queue writes"), - ADD_STAT(fpInstQueueWakeupAccesses, "Number of floating instruction queue " - "wakeup accesses"), - ADD_STAT(vecInstQueueReads, "Number of vector instruction queue reads"), - ADD_STAT(vecInstQueueWrites, "Number of vector instruction queue writes"), - ADD_STAT(vecInstQueueWakeupAccesses, "Number of vector instruction queue " - "wakeup accesses"), - ADD_STAT(intAluAccesses, "Number of integer alu accesses"), - ADD_STAT(fpAluAccesses, "Number of floating point alu accesses"), - ADD_STAT(vecAluAccesses, "Number of vector alu accesses") + ADD_STAT(intInstQueueReads, UNIT_COUNT, + "Number of integer instruction queue reads"), + ADD_STAT(intInstQueueWrites, UNIT_COUNT, + "Number of integer instruction queue writes"), + ADD_STAT(intInstQueueWakeupAccesses, UNIT_COUNT, + "Number of integer instruction queue wakeup accesses"), + ADD_STAT(fpInstQueueReads, UNIT_COUNT, + "Number of floating instruction queue reads"), + ADD_STAT(fpInstQueueWrites, UNIT_COUNT, + "Number of floating instruction queue writes"), + ADD_STAT(fpInstQueueWakeupAccesses, UNIT_COUNT, + "Number of floating instruction queue wakeup accesses"), + ADD_STAT(vecInstQueueReads, UNIT_COUNT, + "Number of vector instruction queue reads"), + ADD_STAT(vecInstQueueWrites, UNIT_COUNT, + "Number of vector instruction queue writes"), + ADD_STAT(vecInstQueueWakeupAccesses, UNIT_COUNT, + "Number of vector instruction queue wakeup accesses"), + ADD_STAT(intAluAccesses, UNIT_COUNT, "Number of integer alu accesses"), + ADD_STAT(fpAluAccesses, UNIT_COUNT, + "Number of floating point alu accesses"), + ADD_STAT(vecAluAccesses, UNIT_COUNT, "Number of vector alu accesses") { using namespace Stats; intInstQueueReads diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh index d8114801b..ad1622d96 100644 --- a/src/cpu/o3/lsq_unit_impl.hh +++ b/src/cpu/o3/lsq_unit_impl.hh @@ -270,16 +270,21 @@ LSQUnit::name() const template LSQUnit::LSQUnitStats::LSQUnitStats(Stats::Group *parent) : Stats::Group(parent), - ADD_STAT(forwLoads, "Number of loads that had data forwarded from" - " stores"), - ADD_STAT(squashedLoads, "Number of loads squashed"), - ADD_STAT(ignoredResponses, "Number of memory responses ignored" - " because the instruction is squashed"), - ADD_STAT(memOrderViolation, "Number of memory ordering violations"), - ADD_STAT(squashedStores, "Number of stores squashed"), - ADD_STAT(rescheduledLoads, "Number of loads that were rescheduled"), - ADD_STAT(blockedByCache, "Number of times an access to memory failed" - " due to the cache being blocked") + ADD_STAT(forwLoads, UNIT_COUNT, + "Number of loads that had data forwarded from stores"), + ADD_STAT(squashedLoads, UNIT_COUNT, + "Number of loads squashed"), + ADD_STAT(ignoredResponses, UNIT_COUNT, + "Number of memory responses ignored because the instruction is " + "squashed"), + ADD_STAT(memOrderViolation, UNIT_COUNT, + "Number of memory ordering violations"), + ADD_STAT(squashedStores, UNIT_COUNT, "Number of stores squashed"), + ADD_STAT(rescheduledLoads, UNIT_COUNT, + "Number of loads that were rescheduled"), + ADD_STAT(blockedByCache, UNIT_COUNT, + "Number of times an access to memory failed due to the cache " + "being blocked") { } diff --git a/src/cpu/o3/mem_dep_unit_impl.hh b/src/cpu/o3/mem_dep_unit_impl.hh index bd8faf82e..40ebd1cc6 100644 --- a/src/cpu/o3/mem_dep_unit_impl.hh +++ b/src/cpu/o3/mem_dep_unit_impl.hh @@ -115,12 +115,12 @@ template MemDepUnit:: MemDepUnitStats::MemDepUnitStats(Stats::Group *parent) : Stats::Group(parent), - ADD_STAT(insertedLoads, + ADD_STAT(insertedLoads, UNIT_COUNT, "Number of loads inserted to the mem dependence unit."), - ADD_STAT(insertedStores, + ADD_STAT(insertedStores, UNIT_COUNT, "Number of stores inserted to the mem dependence unit."), - ADD_STAT(conflictingLoads, "Number of conflicting loads."), - ADD_STAT(conflictingStores, "Number of conflicting stores.") + ADD_STAT(conflictingLoads, UNIT_COUNT, "Number of conflicting loads."), + ADD_STAT(conflictingStores, UNIT_COUNT, "Number of conflicting stores.") { } diff --git a/src/cpu/o3/probe/elastic_trace.cc b/src/cpu/o3/probe/elastic_trace.cc index ee0f886be..ddea0411b 100644 --- a/src/cpu/o3/probe/elastic_trace.cc +++ b/src/cpu/o3/probe/elastic_trace.cc @@ -878,24 +878,28 @@ ElasticTrace::writeDepTrace(uint32_t num_to_write) ElasticTrace::ElasticTraceStats::ElasticTraceStats(Stats::Group *parent) : Stats::Group(parent), - ADD_STAT(numRegDep, "Number of register dependencies recorded during" - " tracing"), - ADD_STAT(numOrderDepStores, "Number of commit order (rob) dependencies" - " for a store recorded on a past load/store during tracing"), - ADD_STAT(numIssueOrderDepLoads, "Number of loads that got assigned" - " issue order dependency because they were dependency-free"), - ADD_STAT(numIssueOrderDepStores, "Number of stores that got assigned" - " issue order dependency because they were dependency-free"), - ADD_STAT(numIssueOrderDepOther, "Number of non load/store insts that" - " got assigned issue order dependency because they were" - " dependency-free"), - ADD_STAT(numFilteredNodes, "No. of nodes filtered out before writing" - " the output trace"), - ADD_STAT(maxNumDependents, "Maximum number or dependents on any" - " instruction"), - ADD_STAT(maxTempStoreSize, "Maximum size of the temporary store during" - " the run"), - ADD_STAT(maxPhysRegDepMapSize, "Maximum size of register dependency map") + ADD_STAT(numRegDep, UNIT_COUNT, + "Number of register dependencies recorded during tracing"), + ADD_STAT(numOrderDepStores, UNIT_COUNT, + "Number of commit order (rob) dependencies for a store " + "recorded on a past load/store during tracing"), + ADD_STAT(numIssueOrderDepLoads, UNIT_COUNT, + "Number of loads that got assigned issue order dependency " + "because they were dependency-free"), + ADD_STAT(numIssueOrderDepStores, UNIT_COUNT, + "Number of stores that got assigned issue order dependency " + "because they were dependency-free"), + ADD_STAT(numIssueOrderDepOther, UNIT_COUNT, + "Number of non load/store insts that got assigned issue order " + "dependency because they were dependency-free"), + ADD_STAT(numFilteredNodes, UNIT_COUNT, + "No. of nodes filtered out before writing the output trace"), + ADD_STAT(maxNumDependents, UNIT_COUNT, + "Maximum number or dependents on any instruction"), + ADD_STAT(maxTempStoreSize, UNIT_COUNT, + "Maximum size of the temporary store during the run"), + ADD_STAT(maxPhysRegDepMapSize, UNIT_COUNT, + "Maximum size of register dependency map") { } diff --git a/src/cpu/o3/rename_impl.hh b/src/cpu/o3/rename_impl.hh index 0f685e586..237ba95b5 100644 --- a/src/cpu/o3/rename_impl.hh +++ b/src/cpu/o3/rename_impl.hh @@ -95,43 +95,47 @@ DefaultRename::name() const template DefaultRename::RenameStats::RenameStats(Stats::Group *parent) : Stats::Group(parent, "rename"), - ADD_STAT(squashCycles, "Number of cycles rename is squashing"), - ADD_STAT(idleCycles, "Number of cycles rename is idle"), - ADD_STAT(blockCycles, "Number of cycles rename is blocking"), - ADD_STAT(serializeStallCycles, "count of cycles rename stalled" - "for serializing inst"), - ADD_STAT(runCycles, "Number of cycles rename is running"), - ADD_STAT(unblockCycles, "Number of cycles rename is unblocking"), - ADD_STAT(renamedInsts, "Number of instructions processed by" - " rename"), - ADD_STAT(squashedInsts, "Number of squashed instructions" - " processed by rename"), - ADD_STAT(ROBFullEvents, "Number of times rename has blocked" - " due to ROB full"), - ADD_STAT(IQFullEvents, "Number of times rename has blocked due" - " to IQ full"), - ADD_STAT(LQFullEvents, "Number of times rename has blocked due" - " to LQ full" ), - ADD_STAT(SQFullEvents, "Number of times rename has blocked due" - " to SQ full"), - ADD_STAT(fullRegistersEvents, "Number of times there has been no" - " free registers"), - ADD_STAT(renamedOperands, "Number of destination operands rename" - " has renamed"), - ADD_STAT(lookups, "Number of register rename lookups that" - " rename has made"), - ADD_STAT(intLookups, "Number of integer rename lookups"), - ADD_STAT(fpLookups, "Number of floating rename lookups"), - ADD_STAT(vecLookups, "Number of vector rename lookups"), - ADD_STAT(vecPredLookups, "Number of vector predicate rename" - " lookups"), - ADD_STAT(committedMaps, "Number of HB maps that are committed"), - ADD_STAT(undoneMaps, "Number of HB maps that are undone due to" - " squashing"), - ADD_STAT(serializing, "count of serializing insts renamed" ), - ADD_STAT(tempSerializing, "count of temporary serializing insts" - " renamed"), - ADD_STAT(skidInsts, "count of insts added to the skid buffer") + ADD_STAT(squashCycles, UNIT_CYCLE, + "Number of cycles rename is squashing"), + ADD_STAT(idleCycles, UNIT_CYCLE, "Number of cycles rename is idle"), + ADD_STAT(blockCycles, UNIT_CYCLE, "Number of cycles rename is blocking"), + ADD_STAT(serializeStallCycles, UNIT_CYCLE, + "count of cycles rename stalled for serializing inst"), + ADD_STAT(runCycles, UNIT_CYCLE, "Number of cycles rename is running"), + ADD_STAT(unblockCycles, UNIT_CYCLE, + "Number of cycles rename is unblocking"), + ADD_STAT(renamedInsts, UNIT_COUNT, + "Number of instructions processed by rename"), + ADD_STAT(squashedInsts, UNIT_COUNT, + "Number of squashed instructions processed by rename"), + ADD_STAT(ROBFullEvents, UNIT_COUNT, + "Number of times rename has blocked due to ROB full"), + ADD_STAT(IQFullEvents, UNIT_COUNT, + "Number of times rename has blocked due to IQ full"), + ADD_STAT(LQFullEvents, UNIT_COUNT, + "Number of times rename has blocked due to LQ full" ), + ADD_STAT(SQFullEvents, UNIT_COUNT, + "Number of times rename has blocked due to SQ full"), + ADD_STAT(fullRegistersEvents, UNIT_COUNT, + "Number of times there has been no free registers"), + ADD_STAT(renamedOperands, UNIT_COUNT, + "Number of destination operands rename has renamed"), + ADD_STAT(lookups, UNIT_COUNT, + "Number of register rename lookups that rename has made"), + ADD_STAT(intLookups, UNIT_COUNT, "Number of integer rename lookups"), + ADD_STAT(fpLookups, UNIT_COUNT, "Number of floating rename lookups"), + ADD_STAT(vecLookups, UNIT_COUNT, "Number of vector rename lookups"), + ADD_STAT(vecPredLookups, UNIT_COUNT, + "Number of vector predicate rename lookups"), + ADD_STAT(committedMaps, UNIT_COUNT, + "Number of HB maps that are committed"), + ADD_STAT(undoneMaps, UNIT_COUNT, + "Number of HB maps that are undone due to squashing"), + ADD_STAT(serializing, UNIT_COUNT, "count of serializing insts renamed"), + ADD_STAT(tempSerializing, UNIT_COUNT, + "count of temporary serializing insts renamed"), + ADD_STAT(skidInsts, UNIT_COUNT, + "count of insts added to the skid buffer") { squashCycles.prereq(squashCycles); idleCycles.prereq(idleCycles); diff --git a/src/cpu/o3/rob_impl.hh b/src/cpu/o3/rob_impl.hh index 348f7253e..59ce058c2 100644 --- a/src/cpu/o3/rob_impl.hh +++ b/src/cpu/o3/rob_impl.hh @@ -539,8 +539,8 @@ ROB::readTailInst(ThreadID tid) template ROB::ROBStats::ROBStats(Stats::Group *parent) : Stats::Group(parent, "rob"), - ADD_STAT(reads, "The number of ROB reads"), - ADD_STAT(writes, "The number of ROB writes") + ADD_STAT(reads, UNIT_COUNT, "The number of ROB reads"), + ADD_STAT(writes, UNIT_COUNT, "The number of ROB writes") { } diff --git a/src/cpu/pred/bpred_unit.cc b/src/cpu/pred/bpred_unit.cc index d32d75b22..ff8c885f3 100644 --- a/src/cpu/pred/bpred_unit.cc +++ b/src/cpu/pred/bpred_unit.cc @@ -69,19 +69,24 @@ BPredUnit::BPredUnit(const Params ¶ms) BPredUnit::BPredUnitStats::BPredUnitStats(Stats::Group *parent) : Stats::Group(parent), - ADD_STAT(lookups, "Number of BP lookups"), - ADD_STAT(condPredicted, "Number of conditional branches predicted"), - ADD_STAT(condIncorrect, "Number of conditional branches incorrect"), - ADD_STAT(BTBLookups, "Number of BTB lookups"), - ADD_STAT(BTBHits, "Number of BTB hits"), - ADD_STAT(BTBHitRatio, "BTB Hit Ratio", BTBHits / BTBLookups), - ADD_STAT(RASUsed, "Number of times the RAS was used to get a target."), - ADD_STAT(RASIncorrect, "Number of incorrect RAS predictions."), - ADD_STAT(indirectLookups, "Number of indirect predictor lookups."), - ADD_STAT(indirectHits, "Number of indirect target hits."), - ADD_STAT(indirectMisses, "Number of indirect misses."), - ADD_STAT(indirectMispredicted, "Number of mispredicted indirect" - " branches.") + ADD_STAT(lookups, UNIT_COUNT, "Number of BP lookups"), + ADD_STAT(condPredicted, UNIT_COUNT, + "Number of conditional branches predicted"), + ADD_STAT(condIncorrect, UNIT_COUNT, + "Number of conditional branches incorrect"), + ADD_STAT(BTBLookups, UNIT_COUNT, "Number of BTB lookups"), + ADD_STAT(BTBHits, UNIT_COUNT, "Number of BTB hits"), + ADD_STAT(BTBHitRatio, UNIT_RATIO, "BTB Hit Ratio", BTBHits / BTBLookups), + ADD_STAT(RASUsed, UNIT_COUNT, + "Number of times the RAS was used to get a target."), + ADD_STAT(RASIncorrect, UNIT_COUNT, + "Number of incorrect RAS predictions."), + ADD_STAT(indirectLookups, UNIT_COUNT, + "Number of indirect predictor lookups."), + ADD_STAT(indirectHits, UNIT_COUNT, "Number of indirect target hits."), + ADD_STAT(indirectMisses, UNIT_COUNT, "Number of indirect misses."), + ADD_STAT(indirectMispredicted, UNIT_COUNT, + "Number of mispredicted indirect branches.") { BTBHitRatio.precision(6); } diff --git a/src/cpu/pred/loop_predictor.cc b/src/cpu/pred/loop_predictor.cc index 884ef6e41..cb6ae1eee 100644 --- a/src/cpu/pred/loop_predictor.cc +++ b/src/cpu/pred/loop_predictor.cc @@ -347,10 +347,12 @@ LoopPredictor::condBranchUpdate(ThreadID tid, Addr branch_pc, bool taken, LoopPredictor::LoopPredictorStats::LoopPredictorStats(Stats::Group *parent) : Stats::Group(parent), - ADD_STAT(correct, "Number of times the loop predictor is" - " the provider and the prediction is correct"), - ADD_STAT(wrong, "Number of times the loop predictor is the" - " provider and the prediction is wrong") + ADD_STAT(correct, UNIT_COUNT, + "Number of times the loop predictor is the provider and the " + "prediction is correct"), + ADD_STAT(wrong, UNIT_COUNT, + "Number of times the loop predictor is the provider and the " + "prediction is wrong") { } diff --git a/src/cpu/pred/statistical_corrector.cc b/src/cpu/pred/statistical_corrector.cc index 0421acbab..b02e73565 100644 --- a/src/cpu/pred/statistical_corrector.cc +++ b/src/cpu/pred/statistical_corrector.cc @@ -400,9 +400,11 @@ StatisticalCorrector::getSizeInBits() const StatisticalCorrector::StatisticalCorrectorStats::StatisticalCorrectorStats( Stats::Group *parent) : Stats::Group(parent), - ADD_STAT(correct, "Number of time the SC predictor is the" - " provider and the prediction is correct"), - ADD_STAT(wrong, "Number of time the SC predictor is the" - " provider and the prediction is wrong") + ADD_STAT(correct, UNIT_COUNT, + "Number of time the SC predictor is the provider and the " + "prediction is correct"), + ADD_STAT(wrong, UNIT_COUNT, + "Number of time the SC predictor is the provider and the " + "prediction is wrong") { } diff --git a/src/cpu/pred/tage_base.cc b/src/cpu/pred/tage_base.cc index 9a436aed1..108f6a2bb 100644 --- a/src/cpu/pred/tage_base.cc +++ b/src/cpu/pred/tage_base.cc @@ -719,32 +719,39 @@ TAGEBase::getGHR(ThreadID tid, BranchInfo *bi) const TAGEBase::TAGEBaseStats::TAGEBaseStats( Stats::Group *parent, unsigned nHistoryTables) : Stats::Group(parent), - ADD_STAT(longestMatchProviderCorrect, "Number of times TAGE Longest" - " Match is the provider and the prediction is correct"), - ADD_STAT(altMatchProviderCorrect, "Number of times TAGE Alt Match" - " is the provider and the prediction is correct"), - ADD_STAT(bimodalAltMatchProviderCorrect, "Number of times TAGE Alt" - " Match is the bimodal and it is the provider and the prediction" - " is correct"), - ADD_STAT(bimodalProviderCorrect, "Number of times there are no" - " hits on the TAGE tables and the bimodal prediction is correct"), - ADD_STAT(longestMatchProviderWrong, "Number of times TAGE Longest" - " Match is the provider and the prediction is wrong"), - ADD_STAT(altMatchProviderWrong, "Number of times TAGE Alt Match is" - " the provider and the prediction is wrong"), - ADD_STAT(bimodalAltMatchProviderWrong, "Number of times TAGE Alt Match" - " is the bimodal and it is the provider and the prediction is" - " wrong"), - ADD_STAT(bimodalProviderWrong, "Number of times there are no hits" - " on the TAGE tables and the bimodal prediction is wrong"), - ADD_STAT(altMatchProviderWouldHaveHit, "Number of times TAGE" - " Longest Match is the provider, the prediction is wrong and" - " Alt Match prediction was correct"), - ADD_STAT(longestMatchProviderWouldHaveHit, "Number of times" - " TAGE Alt Match is the provider, the prediction is wrong and" - " Longest Match prediction was correct"), - ADD_STAT(longestMatchProvider, "TAGE provider for longest match"), - ADD_STAT(altMatchProvider, "TAGE provider for alt match") + ADD_STAT(longestMatchProviderCorrect, UNIT_COUNT, + "Number of times TAGE Longest Match is the provider and the " + "prediction is correct"), + ADD_STAT(altMatchProviderCorrect, UNIT_COUNT, + "Number of times TAGE Alt Match is the provider and the " + "prediction is correct"), + ADD_STAT(bimodalAltMatchProviderCorrect, UNIT_COUNT, + "Number of times TAGE Alt Match is the bimodal and it is the " + "provider and the prediction is correct"), + ADD_STAT(bimodalProviderCorrect, UNIT_COUNT, + "Number of times there are no hits on the TAGE tables and the " + "bimodal prediction is correct"), + ADD_STAT(longestMatchProviderWrong, UNIT_COUNT, + "Number of times TAGE Longest Match is the provider and the " + "prediction is wrong"), + ADD_STAT(altMatchProviderWrong, UNIT_COUNT, + "Number of times TAGE Alt Match is the provider and the " + "prediction is wrong"), + ADD_STAT(bimodalAltMatchProviderWrong, UNIT_COUNT, + "Number of times TAGE Alt Match is the bimodal and it is the " + "provider and the prediction is wrong"), + ADD_STAT(bimodalProviderWrong, UNIT_COUNT, + "Number of times there are no hits on the TAGE tables and the " + "bimodal prediction is wrong"), + ADD_STAT(altMatchProviderWouldHaveHit, UNIT_COUNT, + "Number of times TAGE Longest Match is the provider, the " + "prediction is wrong and Alt Match prediction was correct"), + ADD_STAT(longestMatchProviderWouldHaveHit, UNIT_COUNT, + "Number of times TAGE Alt Match is the provider, the " + "prediction is wrong and Longest Match prediction was correct"), + ADD_STAT(longestMatchProvider, UNIT_COUNT, + "TAGE provider for longest match"), + ADD_STAT(altMatchProvider, UNIT_COUNT, "TAGE provider for alt match") { longestMatchProvider.init(nHistoryTables + 1); altMatchProvider.init(nHistoryTables + 1); diff --git a/src/cpu/simple/exec_context.hh b/src/cpu/simple/exec_context.hh index 1c20e4549..235c703f0 100644 --- a/src/cpu/simple/exec_context.hh +++ b/src/cpu/simple/exec_context.hh @@ -85,53 +85,66 @@ class SimpleExecContext : public ExecContext : Stats::Group(cpu, csprintf("exec_context.thread_%i", thread->threadId()).c_str()), - ADD_STAT(numInsts, "Number of instructions committed"), - ADD_STAT(numOps, + ADD_STAT(numInsts, UNIT_COUNT, + "Number of instructions committed"), + ADD_STAT(numOps, UNIT_COUNT, "Number of ops (including micro ops) committed"), - ADD_STAT(numIntAluAccesses, "Number of integer alu accesses"), - ADD_STAT(numFpAluAccesses, "Number of float alu accesses"), - ADD_STAT(numVecAluAccesses, "Number of vector alu accesses"), - ADD_STAT(numCallsReturns, + ADD_STAT(numIntAluAccesses, UNIT_COUNT, + "Number of integer alu accesses"), + ADD_STAT(numFpAluAccesses, UNIT_COUNT, + "Number of float alu accesses"), + ADD_STAT(numVecAluAccesses, UNIT_COUNT, + "Number of vector alu accesses"), + ADD_STAT(numCallsReturns, UNIT_COUNT, "Number of times a function call or return occured"), - ADD_STAT(numCondCtrlInsts, + ADD_STAT(numCondCtrlInsts, UNIT_COUNT, "Number of instructions that are conditional controls"), - ADD_STAT(numIntInsts, "Number of integer instructions"), - ADD_STAT(numFpInsts, "Number of float instructions"), - ADD_STAT(numVecInsts, "Number of vector instructions"), - ADD_STAT(numIntRegReads, + ADD_STAT(numIntInsts, UNIT_COUNT, + "Number of integer instructions"), + ADD_STAT(numFpInsts, UNIT_COUNT, "Number of float instructions"), + ADD_STAT(numVecInsts, UNIT_COUNT, + "Number of vector instructions"), + ADD_STAT(numIntRegReads, UNIT_COUNT, "Number of times the integer registers were read"), - ADD_STAT(numIntRegWrites, + ADD_STAT(numIntRegWrites, UNIT_COUNT, "Number of times the integer registers were written"), - ADD_STAT(numFpRegReads, + ADD_STAT(numFpRegReads, UNIT_COUNT, "Number of times the floating registers were read"), - ADD_STAT(numFpRegWrites, + ADD_STAT(numFpRegWrites, UNIT_COUNT, "Number of times the floating registers were written"), - ADD_STAT(numVecRegReads, + ADD_STAT(numVecRegReads, UNIT_COUNT, "Number of times the vector registers were read"), - ADD_STAT(numVecRegWrites, + ADD_STAT(numVecRegWrites, UNIT_COUNT, "Number of times the vector registers were written"), - ADD_STAT(numVecPredRegReads, + ADD_STAT(numVecPredRegReads, UNIT_COUNT, "Number of times the predicate registers were read"), - ADD_STAT(numVecPredRegWrites, + ADD_STAT(numVecPredRegWrites, UNIT_COUNT, "Number of times the predicate registers were written"), - ADD_STAT(numCCRegReads, + ADD_STAT(numCCRegReads, UNIT_COUNT, "Number of times the CC registers were read"), - ADD_STAT(numCCRegWrites, + ADD_STAT(numCCRegWrites, UNIT_COUNT, "Number of times the CC registers were written"), - ADD_STAT(numMemRefs, "Number of memory refs"), - ADD_STAT(numLoadInsts, "Number of load instructions"), - ADD_STAT(numStoreInsts, "Number of store instructions"), - ADD_STAT(numIdleCycles, "Number of idle cycles"), - ADD_STAT(numBusyCycles, "Number of busy cycles"), - ADD_STAT(notIdleFraction, "Percentage of non-idle cycles"), - ADD_STAT(idleFraction, "Percentage of idle cycles"), - ADD_STAT(icacheStallCycles, "ICache total stall cycles"), - ADD_STAT(dcacheStallCycles, "DCache total stall cycles"), - ADD_STAT(numBranches, "Number of branches fetched"), - ADD_STAT(numPredictedBranches, + ADD_STAT(numMemRefs, UNIT_COUNT, "Number of memory refs"), + ADD_STAT(numLoadInsts, UNIT_COUNT, + "Number of load instructions"), + ADD_STAT(numStoreInsts, UNIT_COUNT, + "Number of store instructions"), + ADD_STAT(numIdleCycles, UNIT_CYCLE, "Number of idle cycles"), + ADD_STAT(numBusyCycles, UNIT_CYCLE, "Number of busy cycles"), + ADD_STAT(notIdleFraction, UNIT_RATIO, + "Percentage of non-idle cycles"), + ADD_STAT(idleFraction, UNIT_RATIO, "Percentage of idle cycles"), + ADD_STAT(icacheStallCycles, UNIT_CYCLE, + "ICache total stall cycles"), + ADD_STAT(dcacheStallCycles, UNIT_CYCLE, + "DCache total stall cycles"), + ADD_STAT(numBranches, UNIT_COUNT, "Number of branches fetched"), + ADD_STAT(numPredictedBranches, UNIT_COUNT, "Number of branches predicted as taken"), - ADD_STAT(numBranchMispred, "Number of branch mispredictions"), - ADD_STAT(statExecutedInstType, "Class of executed instruction.") + ADD_STAT(numBranchMispred, UNIT_COUNT, + "Number of branch mispredictions"), + ADD_STAT(statExecutedInstType, UNIT_COUNT, + "Class of executed instruction.") { numCCRegReads .flags(Stats::nozero); diff --git a/src/cpu/testers/memtest/memtest.cc b/src/cpu/testers/memtest/memtest.cc index 6297829a0..c2d2bad36 100644 --- a/src/cpu/testers/memtest/memtest.cc +++ b/src/cpu/testers/memtest/memtest.cc @@ -191,8 +191,8 @@ MemTest::completeRequest(PacketPtr pkt, bool functional) } MemTest::MemTestStats::MemTestStats(Stats::Group *parent) : Stats::Group(parent), - ADD_STAT(numReads, "number of read accesses completed"), - ADD_STAT(numWrites, "number of write accesses completed") + ADD_STAT(numReads, UNIT_COUNT, "number of read accesses completed"), + ADD_STAT(numWrites, UNIT_COUNT, "number of write accesses completed") { } diff --git a/src/cpu/testers/traffic_gen/base.cc b/src/cpu/testers/traffic_gen/base.cc index e81706616..46c158b65 100644 --- a/src/cpu/testers/traffic_gen/base.cc +++ b/src/cpu/testers/traffic_gen/base.cc @@ -331,25 +331,31 @@ BaseTrafficGen::noProgress() BaseTrafficGen::StatGroup::StatGroup(Stats::Group *parent) : Stats::Group(parent), - ADD_STAT(numSuppressed, + ADD_STAT(numSuppressed, UNIT_COUNT, "Number of suppressed packets to non-memory space"), - ADD_STAT(numPackets, "Number of packets generated"), - ADD_STAT(numRetries, "Number of retries"), - ADD_STAT(retryTicks, "Time spent waiting due to back-pressure (ticks)"), - ADD_STAT(bytesRead, "Number of bytes read"), - ADD_STAT(bytesWritten, "Number of bytes written"), - ADD_STAT(totalReadLatency, "Total latency of read requests"), - ADD_STAT(totalWriteLatency, "Total latency of write requests"), - ADD_STAT(totalReads, "Total num of reads"), - ADD_STAT(totalWrites, "Total num of writes"), - ADD_STAT(avgReadLatency, "Avg latency of read requests", - totalReadLatency / totalReads), - ADD_STAT(avgWriteLatency, "Avg latency of write requests", + ADD_STAT(numPackets, UNIT_COUNT, "Number of packets generated"), + ADD_STAT(numRetries, UNIT_COUNT, "Number of retries"), + ADD_STAT(retryTicks, UNIT_TICK, + "Time spent waiting due to back-pressure"), + ADD_STAT(bytesRead, UNIT_BYTE, "Number of bytes read"), + ADD_STAT(bytesWritten, UNIT_BYTE, "Number of bytes written"), + ADD_STAT(totalReadLatency, UNIT_TICK, + "Total latency of read requests"), + ADD_STAT(totalWriteLatency, UNIT_TICK, + "Total latency of write requests"), + ADD_STAT(totalReads, UNIT_COUNT, "Total num of reads"), + ADD_STAT(totalWrites, UNIT_COUNT, "Total num of writes"), + ADD_STAT(avgReadLatency, + UNIT_RATE(Stats::Units::Tick, Stats::Units::Count), + "Avg latency of read requests", totalReadLatency / totalReads), + ADD_STAT(avgWriteLatency, + UNIT_RATE(Stats::Units::Tick, Stats::Units::Count), + "Avg latency of write requests", totalWriteLatency / totalWrites), - ADD_STAT(readBW, "Read bandwidth in bytes/s", - bytesRead / simSeconds), - ADD_STAT(writeBW, "Write bandwidth in bytes/s", - bytesWritten / simSeconds) + ADD_STAT(readBW, UNIT_RATE(Stats::Units::Byte, Stats::Units::Second), + "Read bandwidth in bytes/s", bytesRead / simSeconds), + ADD_STAT(writeBW, UNIT_RATE(Stats::Units::Byte, Stats::Units::Second), + "Write bandwidth in bytes/s", bytesWritten / simSeconds) { } diff --git a/src/cpu/thread_state.cc b/src/cpu/thread_state.cc index 5e59eb258..b59b2c637 100644 --- a/src/cpu/thread_state.cc +++ b/src/cpu/thread_state.cc @@ -121,9 +121,9 @@ ThreadState::getVirtProxy() ThreadState::ThreadStateStats::ThreadStateStats(BaseCPU *cpu, const ThreadID& tid) : Stats::Group(cpu, csprintf("thread_%i", tid).c_str()), - ADD_STAT(numInsts, "Number of Instructions committed"), - ADD_STAT(numOps, "Number of Ops committed"), - ADD_STAT(numMemRefs, "Number of Memory References") + ADD_STAT(numInsts, UNIT_COUNT, "Number of Instructions committed"), + ADD_STAT(numOps, UNIT_COUNT, "Number of Ops committed"), + ADD_STAT(numMemRefs, UNIT_COUNT, "Number of Memory References") { } diff --git a/src/cpu/trace/trace_cpu.cc b/src/cpu/trace/trace_cpu.cc index f6792babb..dd031e61f 100644 --- a/src/cpu/trace/trace_cpu.cc +++ b/src/cpu/trace/trace_cpu.cc @@ -200,17 +200,18 @@ TraceCPU::checkAndSchedExitEvent() } } } - -TraceCPU::TraceStats::TraceStats(TraceCPU *trace) : + TraceCPU::TraceStats::TraceStats(TraceCPU *trace) : Stats::Group(trace), - ADD_STAT(numSchedDcacheEvent, - "Number of events scheduled to trigger data request generator"), - ADD_STAT(numSchedIcacheEvent, - "Number of events scheduled to trigger instruction request " - "generator"), - ADD_STAT(numOps, "Number of micro-ops simulated by the Trace CPU"), - ADD_STAT(cpi, "Cycles per micro-op used as a proxy for CPI", - trace->baseStats.numCycles / numOps) + ADD_STAT(numSchedDcacheEvent, UNIT_COUNT, + "Number of events scheduled to trigger data request generator"), + ADD_STAT(numSchedIcacheEvent, UNIT_COUNT, + "Number of events scheduled to trigger instruction request generator"), + ADD_STAT(numOps, UNIT_COUNT, + "Number of micro-ops simulated by the Trace CPU"), + ADD_STAT(cpi, + UNIT_RATE(Stats::Units::Cycle, Stats::Units::Count), + "Cycles per micro-op used as a proxy for CPI", + trace->baseStats.numCycles / numOps) { cpi.precision(6); } @@ -219,16 +220,21 @@ TraceCPU::ElasticDataGen:: ElasticDataGenStatGroup::ElasticDataGenStatGroup(Stats::Group *parent, const std::string& _name) : Stats::Group(parent, _name.c_str()), - ADD_STAT(maxDependents, "Max number of dependents observed on a node"), - ADD_STAT(maxReadyListSize, "Max size of the ready list observed"), - ADD_STAT(numSendAttempted, "Number of first attempts to send a request"), - ADD_STAT(numSendSucceeded, "Number of successful first attempts"), - ADD_STAT(numSendFailed, "Number of failed first attempts"), - ADD_STAT(numRetrySucceeded, "Number of successful retries"), - ADD_STAT(numSplitReqs, "Number of split requests"), - ADD_STAT(numSOLoads, "Number of strictly ordered loads"), - ADD_STAT(numSOStores, "Number of strictly ordered stores"), - ADD_STAT(dataLastTick, "Last tick simulated from the elastic data trace") + ADD_STAT(maxDependents, UNIT_COUNT, + "Max number of dependents observed on a node"), + ADD_STAT(maxReadyListSize, UNIT_COUNT, + "Max size of the ready list observed"), + ADD_STAT(numSendAttempted, UNIT_COUNT, + "Number of first attempts to send a request"), + ADD_STAT(numSendSucceeded, UNIT_COUNT, + "Number of successful first attempts"), + ADD_STAT(numSendFailed, UNIT_COUNT, "Number of failed first attempts"), + ADD_STAT(numRetrySucceeded, UNIT_COUNT, "Number of successful retries"), + ADD_STAT(numSplitReqs, UNIT_COUNT, "Number of split requests"), + ADD_STAT(numSOLoads, UNIT_COUNT, "Number of strictly ordered loads"), + ADD_STAT(numSOStores, UNIT_COUNT, "Number of strictly ordered stores"), + ADD_STAT(dataLastTick, UNIT_TICK, + "Last tick simulated from the elastic data trace") { } @@ -955,11 +961,14 @@ TraceCPU::ElasticDataGen::HardwareResource::printOccupancy() TraceCPU::FixedRetryGen::FixedRetryGenStatGroup::FixedRetryGenStatGroup( Stats::Group *parent, const std::string& _name) : Stats::Group(parent, _name.c_str()), - ADD_STAT(numSendAttempted, "Number of first attempts to send a request"), - ADD_STAT(numSendSucceeded, "Number of successful first attempts"), - ADD_STAT(numSendFailed, "Number of failed first attempts"), - ADD_STAT(numRetrySucceeded, "Number of successful retries"), - ADD_STAT(instLastTick, "Last tick simulated from the fixed inst trace") + ADD_STAT(numSendAttempted, UNIT_COUNT, + "Number of first attempts to send a request"), + ADD_STAT(numSendSucceeded, UNIT_COUNT, + "Number of successful first attempts"), + ADD_STAT(numSendFailed, UNIT_COUNT, "Number of failed first attempts"), + ADD_STAT(numRetrySucceeded, UNIT_COUNT, "Number of successful retries"), + ADD_STAT(instLastTick, UNIT_TICK, + "Last tick simulated from the fixed inst trace") { } -- 2.30.2