From 65e6c42d27e1de154879ca59eccf1a7be2a97ae0 Mon Sep 17 00:00:00 2001 From: Erico Nunes Date: Tue, 23 Jul 2019 01:04:30 +0200 Subject: [PATCH] lima/ppir: fix branch codegen register encode The branch instruction has 6 bits per register operand which allows it to specify a component in the register. Fix codegen so that it outputs the right component, otherwise it always outputs the x component. Signed-off-by: Erico Nunes Reviewed-by: Vasily Khoruzhick Reviewed-by: Qiang Yu --- src/gallium/drivers/lima/ir/pp/codegen.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/lima/ir/pp/codegen.c b/src/gallium/drivers/lima/ir/pp/codegen.c index 6a90dc6ede7..7259eb6ec02 100644 --- a/src/gallium/drivers/lima/ir/pp/codegen.c +++ b/src/gallium/drivers/lima/ir/pp/codegen.c @@ -545,8 +545,8 @@ static void ppir_codegen_encode_branch(ppir_node *node, void *code) branch = ppir_node_to_branch(node); b->branch.unknown_0 = 0x0; - b->branch.arg0_source = ppir_target_get_src_reg_index(&branch->src[0]); - b->branch.arg1_source = ppir_target_get_src_reg_index(&branch->src[1]); + b->branch.arg0_source = get_scl_reg_index(&branch->src[0], 0); + b->branch.arg1_source = get_scl_reg_index(&branch->src[1], 0); b->branch.cond_gt = branch->cond_gt; b->branch.cond_eq = branch->cond_eq; b->branch.cond_lt = branch->cond_lt; -- 2.30.2