From 660b55e6d9aa704022476a50e264e56ecaa3fc2d Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Thu, 16 Feb 2017 22:41:16 +0100 Subject: [PATCH] radeonsi: stop using TGSI_OPCODE_CLAMP by moving it amd/common MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Reviewed-by: Dave Airlie Reviewed-by: Nicolai Hähnle --- src/amd/common/ac_llvm_build.c | 14 ++++++++++++++ src/amd/common/ac_llvm_build.h | 2 ++ src/gallium/drivers/radeonsi/si_shader.c | 10 +++++----- .../drivers/radeonsi/si_shader_internal.h | 3 --- .../drivers/radeonsi/si_shader_tgsi_setup.c | 17 +---------------- 5 files changed, 22 insertions(+), 24 deletions(-) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index 9751a9329dd..351ff88306e 100644 --- a/src/amd/common/ac_llvm_build.c +++ b/src/amd/common/ac_llvm_build.c @@ -814,3 +814,17 @@ ac_emit_umsb(struct ac_llvm_context *ctx, LLVMConstInt(ctx->i32, 0, 0), ""), LLVMConstInt(ctx->i32, -1, true), msb, ""); } + +LLVMValueRef ac_emit_clamp(struct ac_llvm_context *ctx, LLVMValueRef value) +{ + const char *intr = HAVE_LLVM >= 0x0308 ? "llvm.AMDGPU.clamp." : + "llvm.AMDIL.clamp."; + LLVMValueRef args[3] = { + value, + LLVMConstReal(ctx->f32, 0), + LLVMConstReal(ctx->f32, 1), + }; + + return ac_emit_llvm_intrinsic(ctx, intr, ctx->f32, args, 3, + AC_FUNC_ATTR_READNONE); +} diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h index 3258e5ef54a..57bfdbdecd6 100644 --- a/src/amd/common/ac_llvm_build.h +++ b/src/amd/common/ac_llvm_build.h @@ -190,6 +190,8 @@ LLVMValueRef ac_emit_umsb(struct ac_llvm_context *ctx, LLVMValueRef arg, LLVMTypeRef dst_type); +LLVMValueRef ac_emit_clamp(struct ac_llvm_context *ctx, LLVMValueRef value); + #ifdef __cplusplus } #endif diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index d3e3984e697..a67ac821421 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -1018,7 +1018,7 @@ static void store_output_tcs(struct lp_build_tgsi_context *bld_base, LLVMValueRef value = dst[chan_index]; if (inst->Instruction.Saturate) - value = si_llvm_saturate(bld_base, value); + value = ac_emit_clamp(&ctx->ac, value); lds_store(bld_base, chan_index, dw_addr, value); @@ -1810,7 +1810,7 @@ static void si_llvm_init_export_args(struct lp_build_tgsi_context *bld_base, case V_028714_SPI_SHADER_UNORM16_ABGR: for (chan = 0; chan < 4; chan++) { - val[chan] = si_llvm_saturate(bld_base, values[chan]); + val[chan] = ac_emit_clamp(&ctx->ac, values[chan]); val[chan] = LLVMBuildFMul(builder, val[chan], lp_build_const_float(gallivm, 65535), ""); val[chan] = LLVMBuildFAdd(builder, val[chan], @@ -2688,7 +2688,7 @@ static void si_llvm_emit_vs_epilogue(struct lp_build_tgsi_context *bld_base) for (j = 0; j < 4; j++) { addr = ctx->outputs[i][j]; val = LLVMBuildLoad(gallivm->builder, addr, ""); - val = si_llvm_saturate(bld_base, val); + val = ac_emit_clamp(&ctx->ac, val); LLVMBuildStore(gallivm->builder, val, addr); } } @@ -2834,7 +2834,7 @@ static void si_export_mrt_color(struct lp_build_tgsi_context *bld_base, /* Clamp color */ if (ctx->shader->key.part.ps.epilog.clamp_color) for (i = 0; i < 4; i++) - color[i] = si_llvm_saturate(bld_base, color[i]); + color[i] = ac_emit_clamp(&ctx->ac, color[i]); /* Alpha to one */ if (ctx->shader->key.part.ps.epilog.alpha_to_one) @@ -4357,7 +4357,7 @@ static void tex_fetch_args( * Z32_FLOAT, but we don't know that here. */ if (ctx->screen->b.chip_class == VI) - z = si_llvm_saturate(bld_base, z); + z = ac_emit_clamp(&ctx->ac, z); address[count++] = z; } diff --git a/src/gallium/drivers/radeonsi/si_shader_internal.h b/src/gallium/drivers/radeonsi/si_shader_internal.h index 8fde6c25684..a8ef523dd16 100644 --- a/src/gallium/drivers/radeonsi/si_shader_internal.h +++ b/src/gallium/drivers/radeonsi/si_shader_internal.h @@ -202,9 +202,6 @@ LLVMValueRef si_llvm_emit_fetch_64bit(struct lp_build_tgsi_context *bld_base, LLVMValueRef ptr, LLVMValueRef ptr2); -LLVMValueRef si_llvm_saturate(struct lp_build_tgsi_context *bld_base, - LLVMValueRef value); - LLVMValueRef si_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base, const struct tgsi_full_src_register *reg, enum tgsi_opcode_type type, diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c index c7019c1b8b7..6618009610a 100644 --- a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c +++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c @@ -952,21 +952,6 @@ static void emit_declaration(struct lp_build_tgsi_context *bld_base, } } -LLVMValueRef si_llvm_saturate(struct lp_build_tgsi_context *bld_base, - LLVMValueRef value) -{ - struct lp_build_emit_data clamp_emit_data; - - memset(&clamp_emit_data, 0, sizeof(clamp_emit_data)); - clamp_emit_data.arg_count = 3; - clamp_emit_data.args[0] = value; - clamp_emit_data.args[2] = bld_base->base.one; - clamp_emit_data.args[1] = bld_base->base.zero; - - return lp_build_emit_llvm(bld_base, TGSI_OPCODE_CLAMP, - &clamp_emit_data); -} - void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base, const struct tgsi_full_instruction *inst, const struct tgsi_opcode_info *info, @@ -1003,7 +988,7 @@ void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base, if (tgsi_type_is_64bit(dtype) && (chan_index == 1 || chan_index == 3)) continue; if (inst->Instruction.Saturate) - value = si_llvm_saturate(bld_base, value); + value = ac_emit_clamp(&ctx->ac, value); if (reg->Register.File == TGSI_FILE_ADDRESS) { temp_ptr = ctx->addrs[reg->Register.Index][chan_index]; -- 2.30.2