From 661131664980c54b72c6223a53a464f23b8ec0a3 Mon Sep 17 00:00:00 2001 From: Bill Schmidt Date: Thu, 12 Jan 2017 16:01:13 +0000 Subject: [PATCH] re PR target/79044 (ICE in insn_is_swappable_p, at config/rs6000/rs6000.c:41191) [gcc] 2017-01-12 Bill Schmidt PR target/79044 * config/rs6000/rs6000.c (insn_is_swappable_p): Mark element-reversing loads and stores as not swappable. [gcc/testsuite] 2017-01-12 Bill Schmidt PR target/79044 * gcc.target/powerpc/swaps-p8-26.c: New. From-SVN: r244368 --- gcc/ChangeLog | 6 ++++++ gcc/config/rs6000/rs6000.c | 10 +++++++-- gcc/testsuite/ChangeLog | 5 +++++ .../gcc.target/powerpc/swaps-p8-26.c | 21 +++++++++++++++++++ 4 files changed, 40 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/swaps-p8-26.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index da9d21313b6..8c75c474421 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2017-01-12 Bill Schmidt + + PR target/79044 + * config/rs6000/rs6000.c (insn_is_swappable_p): Mark + element-reversing loads and stores as not swappable. + 2017-01-12 Nathan Sidwell Nicolai Stange diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 02b521c8f51..5909e27a6e2 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -41344,7 +41344,10 @@ insn_is_swappable_p (swap_web_entry *insn_entry, rtx insn, if (GET_CODE (body) == SET) { rtx rhs = SET_SRC (body); - gcc_assert (GET_CODE (rhs) == MEM); + /* Even without a swap, the RHS might be a vec_select for, say, + a byte-reversing load. */ + if (GET_CODE (rhs) != MEM) + return 0; if (GET_CODE (XEXP (rhs, 0)) == AND) return 0; @@ -41361,7 +41364,10 @@ insn_is_swappable_p (swap_web_entry *insn_entry, rtx insn, && GET_CODE (SET_SRC (body)) != UNSPEC) { rtx lhs = SET_DEST (body); - gcc_assert (GET_CODE (lhs) == MEM); + /* Even without a swap, the LHS might be a vec_select for, say, + a byte-reversing store. */ + if (GET_CODE (lhs) != MEM) + return 0; if (GET_CODE (XEXP (lhs, 0)) == AND) return 0; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 561bd3fe539..1de9520887d 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2017-01-12 Bill Schmidt + + PR target/79044 + * gcc.target/powerpc/swaps-p8-26.c: New. + 2017-01-12 Richard Biener * gcc.dg/gimplefe-21.c: New testcase. diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-26.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-26.c new file mode 100644 index 00000000000..d01d86b94eb --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-26.c @@ -0,0 +1,21 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O3 " } */ +/* { dg-final { scan-assembler-times "lxvw4x" 2 } } */ +/* { dg-final { scan-assembler "stxvw4x" } } */ +/* { dg-final { scan-assembler-not "xxpermdi" } } */ + +/* Verify that swap optimization does not interfere with element-reversing + loads and stores. */ + +/* Test case to resolve PR79044. */ + +#include + +void pr79044 (float *x, float *y, float *z) +{ + vector float a = __builtin_vec_xl (0, x); + vector float b = __builtin_vec_xl (0, y); + vector float c = __builtin_vec_mul (a, b); + __builtin_vec_xst (c, 0, z); +} -- 2.30.2