From 662ffd3d58c03de3547cdc7f811ec005467e3bc0 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Sat, 27 Feb 2021 16:35:18 +0000
Subject: [PATCH]

---
 openpower/sv/fclass.mdwn | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/openpower/sv/fclass.mdwn b/openpower/sv/fclass.mdwn
index 2890bd91e..b11862965 100644
--- a/openpower/sv/fclass.mdwn
+++ b/openpower/sv/fclass.mdwn
@@ -2,7 +2,7 @@
 
 In SV just as with [[sv/fcvt]] single precision is to be considered half-of-elwidth precision.  Thus when elwidth=FP32 fptstsp will test half that precision, at FP16.
 
-based on xvtstdcsp v3.0B p768
+based on xvtstdcsp v3.0B p768 the instruction performs analysis of the FP number to determine if it is Infinity, NaN, Denormalised or Zero and if so which sign.  unlike xvtstdcsp the result is stored in a Condition Register specified by BF.
 
 | 0.5| 6..10 |11.15| 16.20 | 21...30 |31|  name   |
 | -- | ----- | --- | ----- | ------- |--| ------- |
-- 
2.30.2