From 663827d3e5b2ae5fdbcc8b2b6591910b886af3b2 Mon Sep 17 00:00:00 2001 From: Georg-Johann Lay Date: Tue, 21 Jun 2011 17:30:54 +0000 Subject: [PATCH] re PR target/33049 ([avr] bit extraction non optimal, inversing logic solves problem) PR target/33049 * config/avr/avr.md (extzv): New expander. (*extzv): New insn. (*extzv.qihi1, *extzv.qihi2): New insn-and-split. * config/avr/constraints.md (C04): New constraint. * doc/md.texi (Machine Constraints): Document it. From-SVN: r175269 --- gcc/ChangeLog | 9 +++++ gcc/config/avr/avr.md | 62 +++++++++++++++++++++++++++++++++++ gcc/config/avr/constraints.md | 5 +++ gcc/doc/md.texi | 3 ++ 4 files changed, 79 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index db3b00b0cf4..3e0d8acf44c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2011-06-21 Georg-Johann Lay + + PR target/33049 + * config/avr/avr.md (extzv): New expander. + (*extzv): New insn. + (*extzv.qihi1, *extzv.qihi2): New insn-and-split. + * config/avr/constraints.md (C04): New constraint. + * doc/md.texi (Machine Constraints): Document it. + 2011-06-21 Jakub Jelinek PR middle-end/49489 diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md index 4d77b0e7d07..0e5031ccf06 100644 --- a/gcc/config/avr/avr.md +++ b/gcc/config/avr/avr.md @@ -3539,3 +3539,65 @@ int byteno = INTVAL(operands[2]) / BITS_PER_UNIT; operands[4] = simplify_gen_subreg (QImode, operands[0], mode, byteno); }) + +(define_expand "extzv" + [(set (match_operand:QI 0 "register_operand" "") + (zero_extract:QI (match_operand:QI 1 "register_operand" "") + (match_operand:QI 2 "const1_operand" "") + (match_operand:QI 3 "const_0_to_7_operand" "")))] + "" + "") + +(define_insn "*extzv" + [(set (match_operand:QI 0 "register_operand" "=*d,*d,*d,*d,r") + (zero_extract:QI (match_operand:QI 1 "register_operand" "0,r,0,0,r") + (const_int 1) + (match_operand:QI 2 "const_0_to_7_operand" "L,L,P,C04,n")))] + "" + "@ + andi %0,1 + mov %0,%1\;andi %0,1 + lsr %0\;andi %0,1 + swap %0\;andi %0,1 + bst %1,%2\;clr %0\;bld %0,0" + [(set_attr "length" "1,2,2,2,3") + (set_attr "cc" "set_zn,set_zn,set_zn,set_zn,clobber")]) + +(define_insn_and_split "*extzv.qihi1" + [(set (match_operand:HI 0 "register_operand" "=r") + (zero_extract:HI (match_operand:QI 1 "register_operand" "r") + (const_int 1) + (match_operand:QI 2 "const_0_to_7_operand" "n")))] + "" + "#" + "" + [(set (match_dup 3) + (zero_extract:QI (match_dup 1) + (const_int 1) + (match_dup 2))) + (set (match_dup 4) + (const_int 0))] + { + operands[3] = simplify_gen_subreg (QImode, operands[0], HImode, 0); + operands[4] = simplify_gen_subreg (QImode, operands[0], HImode, 1); + }) + +(define_insn_and_split "*extzv.qihi2" + [(set (match_operand:HI 0 "register_operand" "=r") + (zero_extend:HI + (zero_extract:QI (match_operand:QI 1 "register_operand" "r") + (const_int 1) + (match_operand:QI 2 "const_0_to_7_operand" "n"))))] + "" + "#" + "" + [(set (match_dup 3) + (zero_extract:QI (match_dup 1) + (const_int 1) + (match_dup 2))) + (set (match_dup 4) + (const_int 0))] + { + operands[3] = simplify_gen_subreg (QImode, operands[0], HImode, 0); + operands[4] = simplify_gen_subreg (QImode, operands[0], HImode, 1); + }) diff --git a/gcc/config/avr/constraints.md b/gcc/config/avr/constraints.md index 2ac8833bd51..e754c79070b 100644 --- a/gcc/config/avr/constraints.md +++ b/gcc/config/avr/constraints.md @@ -107,3 +107,8 @@ "A memory address based on Y or Z pointer with displacement." (and (match_code "mem") (match_test "extra_constraint_Q (op)"))) + +(define_constraint "C04" + "Constant integer 4." + (and (match_code "const_int") + (match_test "ival == 4"))) diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index 65e4070d91d..abe51f80727 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -1773,6 +1773,9 @@ Integer constant in the range @minus{}6 @dots{} 5. @item Q A memory address based on Y or Z pointer with displacement. + +@item C04 +Constant integer 4 @end table @item Hewlett-Packard PA-RISC---@file{config/pa/pa.h} -- 2.30.2