From 663c725aa25da254c55873810c801526ae1af836 Mon Sep 17 00:00:00 2001 From: Sergey Shalnov Date: Fri, 1 Dec 2017 06:40:27 +0000 Subject: [PATCH] Fix movdi_internal to return MODE_TI with AVX512 gcc/ * config/i386/i386.md: Fix AVX512 register width in AVX512 instruction. From-SVN: r255293 --- gcc/ChangeLog | 4 ++++ gcc/config/i386/i386.md | 9 ++++++--- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8e7e844c688..e38b73f6bc0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2017-12-01 Sergey Shalnov + + * config/i386/i386.md: Fix AVX512 register width in AVX512 instruction. + 2017-12-01 Sergey Shalnov * config/i386/i386.c (standard_sse_constant_opcode): Fix wrong form for diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index a14efc8d0b6..b4d73dbfd0d 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -2254,10 +2254,13 @@ && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))) return "%vmovd\t{%1, %0|%0, %1}"; return "%vmovq\t{%1, %0|%0, %1}"; + case MODE_TI: + /* Handle AVX512 registers set. */ + if (EXT_REX_SSE_REG_P (operands[0]) + || EXT_REX_SSE_REG_P (operands[1])) + return "vmovdqa64\t{%1, %0|%0, %1}"; return "%vmovdqa\t{%1, %0|%0, %1}"; - case MODE_XI: - return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; case MODE_V2SF: gcc_assert (!TARGET_AVX); @@ -2349,7 +2352,7 @@ (eq_attr "alternative" "12,13") (cond [(ior (match_operand 0 "ext_sse_reg_operand") (match_operand 1 "ext_sse_reg_operand")) - (const_string "XI") + (const_string "TI") (ior (not (match_test "TARGET_SSE2")) (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")) (const_string "V4SF") -- 2.30.2