From 668d5253a59f3b106bae6d1fca8ba1873b2fdce0 Mon Sep 17 00:00:00 2001 From: "N. Engelhardt" Date: Fri, 16 Oct 2020 18:19:58 +0200 Subject: [PATCH] sim -vcd: add date, version, and option for timescale --- passes/sat/sim.cc | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/passes/sat/sim.cc b/passes/sat/sim.cc index fb496ff87..4c9af0bf6 100644 --- a/passes/sat/sim.cc +++ b/passes/sat/sim.cc @@ -633,6 +633,7 @@ struct SimWorker : SimShared SimInstance *top = nullptr; std::ofstream vcdfile; pool clock, clockn, reset, resetn; + std::string timescale; ~SimWorker() { @@ -644,6 +645,15 @@ struct SimWorker : SimShared if (!vcdfile.is_open()) return; + vcdfile << stringf("$version %s $end\n", yosys_version_str); + vcdfile << stringf("$date "); + std::time_t t = std::time(nullptr); + vcdfile << std::put_time(std::localtime(&t), "%c %Z"); + vcdfile << stringf(" $end\n"); + + if (!timescale.empty()) + vcdfile << stringf("$timescale %s $end\n", timescale.c_str()); + int id = 1; top->write_vcd_header(vcdfile, id); @@ -783,6 +793,9 @@ struct SimPass : public Pass { log(" -zinit\n"); log(" zero-initialize all uninitialized regs and memories\n"); log("\n"); + log(" -timescale \n"); + log(" include the specified timescale declaration in the vcd\n"); + log("\n"); log(" -n \n"); log(" number of cycles to simulate (default: 20)\n"); log("\n"); @@ -833,6 +846,10 @@ struct SimPass : public Pass { worker.resetn.insert(RTLIL::escape_id(args[++argidx])); continue; } + if (args[argidx] == "-timescale" && argidx+1 < args.size()) { + worker.timescale = args[++argidx]; + continue; + } if (args[argidx] == "-a") { worker.hide_internal = false; continue; -- 2.30.2