From 66a0970a1f728399bc81b38b845e2045605a2294 Mon Sep 17 00:00:00 2001 From: Vladimir Makarov Date: Fri, 7 Dec 2018 16:08:17 +0000 Subject: [PATCH] re PR rtl-optimization/88349 ([MIPS] Redundant store instructions generated start with r266385) 2018-12-07 Vladimir Makarov PR rtl-optimization/88349 * ira-costs.c (record_operand_costs): Check bigger reg class on NO_REGS. 2018-12-07 Vladimir Makarov PR rtl-optimization/88349 * gcc.target/mips/pr88349.c: New. From-SVN: r266894 --- gcc/ChangeLog | 6 ++++++ gcc/ira-costs.c | 5 +++-- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/mips/pr88349.c | 14 ++++++++++++++ 4 files changed, 28 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/mips/pr88349.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 95c1a4a8029..3bdbf563898 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2018-12-07 Vladimir Makarov + + PR rtl-optimization/88349 + * ira-costs.c (record_operand_costs): Check bigger reg class on + NO_REGS. + 2018-12-07 Richard Sandiford * config/aarch64/aarch64-sve.md (*mul3, *v3): diff --git a/gcc/ira-costs.c b/gcc/ira-costs.c index d0f097bb2d5..14d0ff3a9eb 100644 --- a/gcc/ira-costs.c +++ b/gcc/ira-costs.c @@ -1327,8 +1327,9 @@ record_operand_costs (rtx_insn *insn, enum reg_class *pref) fit the the hard reg class (e.g. DImode for AREG on i386). Check this and use a bigger class to get the right cost. */ - if (! ira_hard_reg_in_set_p (other_regno, mode, - reg_class_contents[hard_reg_class])) + if (bigger_hard_reg_class != NO_REGS + && ! ira_hard_reg_in_set_p (other_regno, mode, + reg_class_contents[hard_reg_class])) hard_reg_class = bigger_hard_reg_class; i = regno == (int) REGNO (src) ? 1 : 0; for (k = cost_classes_ptr->num - 1; k >= 0; k--) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index fd940b465b5..8ad888d1fa9 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-12-07 Vladimir Makarov + + PR rtl-optimization/88349 + * gcc.target/mips/pr88349.c: New. + 2018-12-07 Jakub Jelinek PR c++/86669 diff --git a/gcc/testsuite/gcc.target/mips/pr88349.c b/gcc/testsuite/gcc.target/mips/pr88349.c new file mode 100644 index 00000000000..f070d2442eb --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/pr88349.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-mel -mabi=32 -march=mips64r2 -fexpensive-optimizations" } */ +/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */ + +typedef int DI __attribute__((mode(DI))); +typedef int SI __attribute__((mode(SI))); + +__attribute__((mips16)) SI +f (SI x, SI y) +{ + return ((DI) x * y) >> 32; +} + +/* { dg-final { scan-assembler-not "\tsw\t" } } */ -- 2.30.2