From 67645ce7dde469aa66746c1001e96187fb984583 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Thu, 26 Jan 2017 13:27:15 +0100 Subject: [PATCH] boards/platform/arty: add spiflash_4x/spiflash_1x to test SpiFlashDualQuad and SpiFlashSingle --- litex/boards/platforms/arty.py | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/litex/boards/platforms/arty.py b/litex/boards/platforms/arty.py index 0ed3f420..d4c88eae 100644 --- a/litex/boards/platforms/arty.py +++ b/litex/boards/platforms/arty.py @@ -37,11 +37,19 @@ _io = [ Subsignal("rx", Pins("A9")), IOStandard("LVCMOS33")), - ("spiflash", 0, # clock needs to be accessed through STARTUPE2 + ("spiflash_4x", 0, # clock needs to be accessed through STARTUPE2 Subsignal("cs_n", Pins("L13")), Subsignal("dq", Pins("K17", "K18", "L14", "M14")), IOStandard("LVCMOS33") ), + ("spiflash_1x", 0, # clock needs to be accessed through STARTUPE2 + Subsignal("cs_n", Pins("L13")), + Subsignal("mosi", Pins("K17")), + Subsignal("miso", Pins("K18")), + Subsignal("wp", Pins("L14")), + Subsignal("hold", Pins("M14")), + IOStandard("LVCMOS33") + ), ("eth_ref_clk", 0, Pins("G18"), IOStandard("LVCMOS33")), -- 2.30.2