From 67cd71d9ec5087bdcfa8fda1172abc0049df8455 Mon Sep 17 00:00:00 2001
From: Andrew Waterman <andrew@sifive.com>
Date: Sat, 18 Feb 2017 17:24:04 -0800
Subject: [PATCH] Make HW setting of PTE A/D bits optional (by configure arg)

https://github.com/riscv/riscv-isa-manual/issues/14
---
 config.h.in    |  3 +++
 configure      | 30 +++++++++++++++++++++++++++++-
 riscv/mmu.cc   |  9 ++++++++-
 riscv/riscv.ac |  5 +++++
 4 files changed, 45 insertions(+), 2 deletions(-)

diff --git a/config.h.in b/config.h.in
index a4070ff..566b1bc 100644
--- a/config.h.in
+++ b/config.h.in
@@ -66,6 +66,9 @@
 /* Enable commit log generation */
 #undef RISCV_ENABLE_COMMITLOG
 
+/* Enable hardware management of PTE accessed and dirty bits */
+#undef RISCV_ENABLE_DIRTY
+
 /* Enable PC histogram generation */
 #undef RISCV_ENABLE_HISTOGRAM
 
diff --git a/configure b/configure
index 2c946e7..4c272b3 100755
--- a/configure
+++ b/configure
@@ -675,6 +675,7 @@ infodir
 docdir
 oldincludedir
 includedir
+runstatedir
 localstatedir
 sharedstatedir
 sysconfdir
@@ -703,6 +704,7 @@ with_isa
 with_fesvr
 enable_commitlog
 enable_histogram
+enable_dirty
 '
       ac_precious_vars='build_alias
 host_alias
@@ -756,6 +758,7 @@ datadir='${datarootdir}'
 sysconfdir='${prefix}/etc'
 sharedstatedir='${prefix}/com'
 localstatedir='${prefix}/var'
+runstatedir='${localstatedir}/run'
 includedir='${prefix}/include'
 oldincludedir='/usr/include'
 docdir='${datarootdir}/doc/${PACKAGE_TARNAME}'
@@ -1008,6 +1011,15 @@ do
   | -silent | --silent | --silen | --sile | --sil)
     silent=yes ;;
 
+  -runstatedir | --runstatedir | --runstatedi | --runstated \
+  | --runstate | --runstat | --runsta | --runst | --runs \
+  | --run | --ru | --r)
+    ac_prev=runstatedir ;;
+  -runstatedir=* | --runstatedir=* | --runstatedi=* | --runstated=* \
+  | --runstate=* | --runstat=* | --runsta=* | --runst=* | --runs=* \
+  | --run=* | --ru=* | --r=*)
+    runstatedir=$ac_optarg ;;
+
   -sbindir | --sbindir | --sbindi | --sbind | --sbin | --sbi | --sb)
     ac_prev=sbindir ;;
   -sbindir=* | --sbindir=* | --sbindi=* | --sbind=* | --sbin=* \
@@ -1145,7 +1157,7 @@ fi
 for ac_var in	exec_prefix prefix bindir sbindir libexecdir datarootdir \
 		datadir sysconfdir sharedstatedir localstatedir includedir \
 		oldincludedir docdir infodir htmldir dvidir pdfdir psdir \
-		libdir localedir mandir
+		libdir localedir mandir runstatedir
 do
   eval ac_val=\$$ac_var
   # Remove trailing slashes.
@@ -1298,6 +1310,7 @@ Fine tuning of the installation directories:
   --sysconfdir=DIR        read-only single-machine data [PREFIX/etc]
   --sharedstatedir=DIR    modifiable architecture-independent data [PREFIX/com]
   --localstatedir=DIR     modifiable single-machine data [PREFIX/var]
+  --runstatedir=DIR       modifiable per-process data [LOCALSTATEDIR/run]
   --libdir=DIR            object code libraries [EPREFIX/lib]
   --includedir=DIR        C header files [PREFIX/include]
   --oldincludedir=DIR     C header files for non-gcc [/usr/include]
@@ -1336,6 +1349,8 @@ Optional Features:
                           Enable all optional subprojects
   --enable-commitlog      Enable commit log generation
   --enable-histogram      Enable PC histogram generation
+  --enable-dirty          Enable hardware management of PTE accessed and dirty
+                          bits
 
 Optional Packages:
   --with-PACKAGE[=ARG]    use PACKAGE [ARG=yes]
@@ -4605,6 +4620,19 @@ if test "x$enable_histogram" = "xyes"; then :
 $as_echo "#define RISCV_ENABLE_HISTOGRAM /**/" >>confdefs.h
 
 
+fi
+
+# Check whether --enable-dirty was given.
+if test "${enable_dirty+set}" = set; then :
+  enableval=$enable_dirty;
+fi
+
+if test "x$enable_dirty" = "xyes"; then :
+
+
+$as_echo "#define RISCV_ENABLE_DIRTY /**/" >>confdefs.h
+
+
 fi
 
 
diff --git a/riscv/mmu.cc b/riscv/mmu.cc
index 6162fd0..06bc11b 100644
--- a/riscv/mmu.cc
+++ b/riscv/mmu.cc
@@ -197,8 +197,15 @@ reg_t mmu_t::walk(reg_t addr, access_type type, reg_t mode)
                                !((pte & PTE_R) && (pte & PTE_W))) {
       break;
     } else {
+      reg_t ad = PTE_A | ((type == STORE) * PTE_D);
+#ifdef RISCV_ENABLE_DIRTY
       // set accessed and possibly dirty bits.
-      *(uint32_t*)ppte |= PTE_A | ((type == STORE) * PTE_D);
+      *(uint32_t*)ppte |= ad;
+#else
+      // take exception if access or possibly dirty bit is not set.
+      if ((pte & ad) != ad)
+        break;
+#endif
       // for superpage mappings, make a fake leaf PTE for the TLB's benefit.
       reg_t vpn = addr >> PGSHIFT;
       reg_t value = (ppn | (vpn & ((reg_t(1) << ptshift) - 1))) << PGSHIFT;
diff --git a/riscv/riscv.ac b/riscv/riscv.ac
index 7b48be6..a099269 100644
--- a/riscv/riscv.ac
+++ b/riscv/riscv.ac
@@ -32,3 +32,8 @@ AC_ARG_ENABLE([histogram], AS_HELP_STRING([--enable-histogram], [Enable PC histo
 AS_IF([test "x$enable_histogram" = "xyes"], [
   AC_DEFINE([RISCV_ENABLE_HISTOGRAM],,[Enable PC histogram generation])
 ])
+
+AC_ARG_ENABLE([dirty], AS_HELP_STRING([--enable-dirty], [Enable hardware management of PTE accessed and dirty bits]))
+AS_IF([test "x$enable_dirty" = "xyes"], [
+  AC_DEFINE([RISCV_ENABLE_DIRTY],,[Enable hardware management of PTE accessed and dirty bits])
+])
-- 
2.30.2