From 680369498d9a9c66ee873f8a9d00c188451dedd6 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 4 Apr 2020 20:57:19 +0100 Subject: [PATCH] remove equivalence operator, use invert XOR --- openpower/isa/condition.mdwn | 2 +- openpower/isa/fixedlogical.mdwn | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/openpower/isa/condition.mdwn b/openpower/isa/condition.mdwn index c47fa6fef..c12c3c861 100644 --- a/openpower/isa/condition.mdwn +++ b/openpower/isa/condition.mdwn @@ -64,7 +64,7 @@ XL-Form * creqv BT,BA,BB - CR[BT+32] <- CR[BA+32] => CR[BB+32] + CR[BT+32] <- ¬(CR[BA+32] ^ CR[BB+32]) Special Registers Altered: diff --git a/openpower/isa/fixedlogical.mdwn b/openpower/isa/fixedlogical.mdwn index 199785caa..b3e620ea9 100644 --- a/openpower/isa/fixedlogical.mdwn +++ b/openpower/isa/fixedlogical.mdwn @@ -142,7 +142,7 @@ X-Form * eqv RA,RS,RB (Rc=0) * eqv. RA,RS,RB (Rc=1) - RA <- (RS) => (RB) + RA <- ¬((RS) ^ (RB)) Special Registers Altered: -- 2.30.2