From 6820664ac6c49245baec9e9a76945cf6991c13e2 Mon Sep 17 00:00:00 2001 From: Thomas Preud'homme Date: Thu, 15 Jun 2017 09:31:04 +0000 Subject: [PATCH] [ARM] Make gcc.target/arm/its.c more robust 2017-06-15 Thomas Preud'homme gcc/testsuite/ * gcc.target/arm/its.c: Check that no IT blocks has more than 2 instructions in it rather than the number of IT blocks being 2. Transfer scan directive arm_thumb2 restriction to the whole testcase and restrict further to Thumb-only targets. From-SVN: r249215 --- gcc/testsuite/ChangeLog | 7 +++++++ gcc/testsuite/gcc.target/arm/its.c | 6 +++++- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 5e05a353702..4b7433e2eda 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2017-06-15 Thomas Preud'homme + + * gcc.target/arm/its.c: Check that no IT blocks has more than 2 + instructions in it rather than the number of IT blocks being 2. + Transfer scan directive arm_thumb2 restriction to the whole + testcase and restrict further to Thumb-only targets. + 2017-06-15 Tamar Christina * gcc.target/arm/sdiv_costs_1.c: diff --git a/gcc/testsuite/gcc.target/arm/its.c b/gcc/testsuite/gcc.target/arm/its.c index 5425f1e9205..f81a0df51cd 100644 --- a/gcc/testsuite/gcc.target/arm/its.c +++ b/gcc/testsuite/gcc.target/arm/its.c @@ -1,4 +1,6 @@ /* { dg-do compile } */ +/* { dg-require-effective-target arm_cortex_m } */ +/* { dg-require-effective-target arm_thumb2 } */ /* { dg-options "-O2" } */ int test (int a, int b) { @@ -17,4 +19,6 @@ int test (int a, int b) r -= 3; return r; } -/* { dg-final { scan-assembler-times "\tit" 2 { target arm_thumb2 } } } */ +/* Ensure there is no IT block with more than 2 instructions, ie. we only allow + IT, ITT and ITE. */ +/* { dg-final { scan-assembler-not "\\sit\[te\]{2}" } } */ -- 2.30.2