From 683cf11b81dc775016ef96748809de473c350442 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Tue, 28 May 2019 18:55:30 -0400 Subject: [PATCH] radeonsi/gfx10: prefetch HW GS when NGG is used Acked-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_cp_dma.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c index e9ddfe6f49d..d1b44b894b1 100644 --- a/src/gallium/drivers/radeonsi/si_cp_dma.c +++ b/src/gallium/drivers/radeonsi/si_cp_dma.c @@ -455,7 +455,7 @@ void cik_emit_prefetch_L2(struct si_context *sctx, bool vertex_stage_only) /* Prefetch shaders and VBO descriptors to TC L2. */ if (sctx->chip_class >= GFX9) { /* Choose the right spot for the VBO prefetch. */ - if (sctx->tes_shader.cso) { + if (sctx->queued.named.hs) { if (mask & SI_PREFETCH_HS) cik_prefetch_shader_async(sctx, sctx->queued.named.hs); if (mask & SI_PREFETCH_VBO_DESCRIPTORS) @@ -470,7 +470,7 @@ void cik_emit_prefetch_L2(struct si_context *sctx, bool vertex_stage_only) cik_prefetch_shader_async(sctx, sctx->queued.named.gs); if (mask & SI_PREFETCH_VS) cik_prefetch_shader_async(sctx, sctx->queued.named.vs); - } else if (sctx->gs_shader.cso) { + } else if (sctx->queued.named.gs) { if (mask & SI_PREFETCH_GS) cik_prefetch_shader_async(sctx, sctx->queued.named.gs); if (mask & SI_PREFETCH_VBO_DESCRIPTORS) -- 2.30.2