From 687e62a5d76e2e4cbbc6268e5b0e3f148b681185 Mon Sep 17 00:00:00 2001 From: =?utf8?q?St=C3=A9phane=20Marchesin?= Date: Thu, 22 Sep 2011 12:43:24 -0700 Subject: [PATCH] i915g: Fix peephole optimization for MOVs. --- src/gallium/drivers/i915/i915_fpc_optimize.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/gallium/drivers/i915/i915_fpc_optimize.c b/src/gallium/drivers/i915/i915_fpc_optimize.c index 50b3a28573c..0d680fbf876 100644 --- a/src/gallium/drivers/i915/i915_fpc_optimize.c +++ b/src/gallium/drivers/i915/i915_fpc_optimize.c @@ -62,6 +62,13 @@ static boolean same_src_reg(struct i915_full_src_register* d1, struct i915_full_ d1->Register.Negate == d2->Register.Negate); } +static boolean has_destination(unsigned opcode) +{ + return (opcode != TGSI_OPCODE_NOP && + opcode != TGSI_OPCODE_KIL && + opcode != TGSI_OPCODE_RET); +} + static boolean is_unswizzled(struct i915_full_src_register* r, unsigned write_mask) { @@ -192,6 +199,7 @@ static void i915_fpc_optimize_useless_mov(union i915_full_token* current, union if ( current->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION && next->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION && next->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV && + has_destination(current->FullInstruction.Instruction.Opcode) && next->FullInstruction.Instruction.Saturate == TGSI_SAT_NONE && next->FullInstruction.Src[0].Register.Absolute == 0 && next->FullInstruction.Src[0].Register.Negate == 0 && -- 2.30.2