From 687feba4ef5b7c127d991ddd64b9471054ff9355 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Sun, 22 Nov 2020 03:43:41 +0000
Subject: [PATCH]

---
 openpower/sv/16_bit_compressed.mdwn | 48 +++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/openpower/sv/16_bit_compressed.mdwn b/openpower/sv/16_bit_compressed.mdwn
index 251bdf59e..c104a050c 100644
--- a/openpower/sv/16_bit_compressed.mdwn
+++ b/openpower/sv/16_bit_compressed.mdwn
@@ -505,3 +505,51 @@ space (when RA==0)
       sed 's/\([, (]\)r[1-9][0-9]*/\1r1/g;
       s/\([ ,]\)-*[0-9]\+\([^0-9]\)/\11\2/g' | sort | uniq --count |
       sort -n | less
+
+# gcc register allocation
+
+FTR, information extracted from gcc's gcc/config/rs6000/rs6000.h about fixed registers (assigned to special purposes) and register allocation order:
+
+Special-purpose registers on ppc are:
+
+    r0: constant zero/throw-away
+    r1: stack pointer
+    r2: thread-local storage pointer in 32-bit mode
+    r2: non-minimal TOC register
+    r10: EH return stack adjust register
+    r11: static chain pointer
+    r13: thread-local storage pointer in 64-bit mode
+    r30: minimal-TOC/-fPIC/-fpic base register
+    r31: frame pointer
+    lr: return address register
+
+the register allocation order in GCC (i.e., it takes the earliest available register that fits the constraints) is:
+
+     We allocate in the following order:
+	fp0		(not saved or used for anything)
+	fp13 - fp2	(not saved; incoming fp arg registers)
+	fp1		(not saved; return value)
+	fp31 - fp14	(saved; order given to save least number)
+	cr7, cr5	(not saved or special)
+	cr6		(not saved, but used for vector operations)
+	cr1		(not saved, but used for FP operations)
+	cr0		(not saved, but used for arithmetic operations)
+	cr4, cr3, cr2	(saved)
+	r9		(not saved; best for TImode)
+	r10, r8-r4	(not saved; highest first for less conflict with params)
+	r3		(not saved; return value register)
+	r11		(not saved; later alloc to help shrink-wrap)
+	r0		(not saved; cannot be base reg)
+	r31 - r13	(saved; order given to save least number)
+	r12		(not saved; if used for DImode or DFmode would use r13)
+	ctr		(not saved; when we have the choice ctr is better)
+	lr		(saved)
+	r1, r2, ap, ca	(fixed)
+	v0 - v1		(not saved or used for anything)
+	v13 - v3	(not saved; incoming vector arg registers)
+	v2		(not saved; incoming vector arg reg; return value)
+	v19 - v14	(not saved or used for anything)
+	v31 - v20	(saved; order given to save least number)
+	vrsave, vscr	(fixed)
+	sfp		(fixed)
+
-- 
2.30.2