From 68c9554732d5ea7c2edd6282d6d0b3ba3b7303bb Mon Sep 17 00:00:00 2001 From: Rhys Perry Date: Thu, 12 Sep 2019 15:28:49 +0100 Subject: [PATCH] aco: Have s_waitcnt_vscnt write to NULL. MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Not sure if this instruction actually writes anything, but LLVM disassembles a destination and sets it to NULL. Signed-off-by: Rhys Perry Reviewed-By: Timur Kristóf Reviewed-by: Daniel Schürmann --- src/amd/compiler/aco_insert_waitcnt.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/amd/compiler/aco_insert_waitcnt.cpp b/src/amd/compiler/aco_insert_waitcnt.cpp index 9bd9f06e6c2..8cfb4f3f695 100644 --- a/src/amd/compiler/aco_insert_waitcnt.cpp +++ b/src/amd/compiler/aco_insert_waitcnt.cpp @@ -378,7 +378,7 @@ wait_imm kill(Instruction* instr, wait_ctx& ctx) bar.vs = wait_imm::unset_counter; } - /* remove all vgprs with higher counter from map */ + /* remove all gprs with higher counter from map */ std::map::iterator it = ctx.gpr_map.begin(); while (it != ctx.gpr_map.end()) { @@ -616,7 +616,8 @@ void emit_waitcnt(wait_ctx& ctx, std::vector>& instructions { if (imm.vs != wait_imm::unset_counter) { assert(ctx.chip_class >= GFX10); - SOPK_instruction* waitcnt_vs = create_instruction(aco_opcode::s_waitcnt_vscnt, Format::SOPK, 0, 0); + SOPK_instruction* waitcnt_vs = create_instruction(aco_opcode::s_waitcnt_vscnt, Format::SOPK, 0, 1); + waitcnt_vs->definitions[0] = Definition(sgpr_null, s1); waitcnt_vs->imm = imm.vs; instructions.emplace_back(waitcnt_vs); imm.vs = wait_imm::unset_counter; -- 2.30.2