From 68d94a608a6d46156a567b8f0e011ac58054975e Mon Sep 17 00:00:00 2001 From: Brian Paul Date: Wed, 21 Oct 2009 20:02:33 -0600 Subject: [PATCH] intel: use MESA_FORMAT_S8_Z24 format and avoid z24s8/s8z24 conversions --- src/mesa/drivers/dri/intel/intel_buffers.c | 2 +- src/mesa/drivers/dri/intel/intel_fbo.c | 26 +++++++++---------- src/mesa/drivers/dri/intel/intel_span.c | 20 +++----------- src/mesa/drivers/dri/intel/intel_tex_format.c | 2 +- 4 files changed, 19 insertions(+), 31 deletions(-) diff --git a/src/mesa/drivers/dri/intel/intel_buffers.c b/src/mesa/drivers/dri/intel/intel_buffers.c index fce227e9d9e..6661cc77d2d 100644 --- a/src/mesa/drivers/dri/intel/intel_buffers.c +++ b/src/mesa/drivers/dri/intel/intel_buffers.c @@ -257,7 +257,7 @@ intel_draw_buffer(GLcontext * ctx, struct gl_framebuffer *fb) if (fb->_StencilBuffer && fb->_StencilBuffer->Wrapped) { irbStencil = intel_renderbuffer(fb->_StencilBuffer->Wrapped); if (irbStencil && irbStencil->region) { - ASSERT(irbStencil->Base.Format == MESA_FORMAT_Z24_S8); + ASSERT(irbStencil->Base.Format == MESA_FORMAT_S8_Z24); FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, GL_FALSE); } else { diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c index 292cccf7f2b..2d73f6e2a3a 100644 --- a/src/mesa/drivers/dri/intel/intel_fbo.c +++ b/src/mesa/drivers/dri/intel/intel_fbo.c @@ -148,10 +148,10 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb, case GL_STENCIL_INDEX8_EXT: case GL_STENCIL_INDEX16_EXT: /* alloc a depth+stencil buffer */ - rb->Format = MESA_FORMAT_Z24_S8; + rb->Format = MESA_FORMAT_S8_Z24; rb->DataType = GL_UNSIGNED_INT_24_8_EXT; cpp = 4; - irb->texformat = MESA_FORMAT_Z24_S8; + irb->texformat = MESA_FORMAT_S8_Z24; break; case GL_DEPTH_COMPONENT16: rb->Format = MESA_FORMAT_Z16; @@ -162,17 +162,17 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb, case GL_DEPTH_COMPONENT: case GL_DEPTH_COMPONENT24: case GL_DEPTH_COMPONENT32: - rb->Format = MESA_FORMAT_Z24_S8; + rb->Format = MESA_FORMAT_S8_Z24; rb->DataType = GL_UNSIGNED_INT_24_8_EXT; cpp = 4; - irb->texformat = MESA_FORMAT_Z24_S8; + irb->texformat = MESA_FORMAT_S8_Z24; break; case GL_DEPTH_STENCIL_EXT: case GL_DEPTH24_STENCIL8_EXT: - rb->Format = MESA_FORMAT_Z24_S8; + rb->Format = MESA_FORMAT_S8_Z24; rb->DataType = GL_UNSIGNED_INT_24_8_EXT; cpp = 4; - irb->texformat = MESA_FORMAT_Z24_S8; + irb->texformat = MESA_FORMAT_S8_Z24; break; default: _mesa_problem(ctx, @@ -328,10 +328,10 @@ intel_create_renderbuffer(GLenum intFormat) irb->texformat = MESA_FORMAT_ARGB8888; break; case GL_STENCIL_INDEX8_EXT: - irb->Base.Format = MESA_FORMAT_Z24_S8; + irb->Base.Format = MESA_FORMAT_S8_Z24; irb->Base._BaseFormat = GL_STENCIL_INDEX; irb->Base.DataType = GL_UNSIGNED_BYTE; - irb->texformat = MESA_FORMAT_Z24_S8; + irb->texformat = MESA_FORMAT_S8_Z24; break; case GL_DEPTH_COMPONENT16: irb->Base.Format = MESA_FORMAT_Z16; @@ -340,16 +340,16 @@ intel_create_renderbuffer(GLenum intFormat) irb->texformat = MESA_FORMAT_Z16; break; case GL_DEPTH_COMPONENT24: - irb->Base.Format = MESA_FORMAT_Z24_S8; + irb->Base.Format = MESA_FORMAT_S8_Z24; irb->Base._BaseFormat = GL_DEPTH_COMPONENT; irb->Base.DataType = GL_UNSIGNED_INT; - irb->texformat = MESA_FORMAT_Z24_S8; + irb->texformat = MESA_FORMAT_S8_Z24; break; case GL_DEPTH24_STENCIL8_EXT: - irb->Base.Format = MESA_FORMAT_Z24_S8; + irb->Base.Format = MESA_FORMAT_S8_Z24; irb->Base._BaseFormat = GL_DEPTH_STENCIL; irb->Base.DataType = GL_UNSIGNED_INT_24_8_EXT; - irb->texformat = MESA_FORMAT_Z24_S8; + irb->texformat = MESA_FORMAT_S8_Z24; break; default: _mesa_problem(NULL, @@ -457,7 +457,7 @@ intel_update_wrapper(GLcontext *ctx, struct intel_renderbuffer *irb, irb->Base.DataType = GL_UNSIGNED_SHORT; DBG("Render to DEPTH16 texture OK\n"); } - else if (texImage->TexFormat == MESA_FORMAT_Z24_S8) { + else if (texImage->TexFormat == MESA_FORMAT_S8_Z24) { irb->Base.DataType = GL_UNSIGNED_INT_24_8_EXT; DBG("Render to DEPTH_STENCIL texture OK\n"); } diff --git a/src/mesa/drivers/dri/intel/intel_span.c b/src/mesa/drivers/dri/intel/intel_span.c index 540ebca15c0..81692e93a99 100644 --- a/src/mesa/drivers/dri/intel/intel_span.c +++ b/src/mesa/drivers/dri/intel/intel_span.c @@ -131,18 +131,6 @@ pwrite_8(struct intel_renderbuffer *irb, uint32_t offset, uint8_t val) dri_bo_subdata(irb->region->buffer, offset, 1, &val); } -static uint32_t -z24s8_to_s8z24(uint32_t val) -{ - return (val << 24) | (val >> 8); -} - -static uint32_t -s8z24_to_z24s8(uint32_t val) -{ - return (val >> 24) | (val << 8); -} - static uint32_t no_tile_swizzle(struct intel_renderbuffer *irb, int x, int y) { @@ -374,8 +362,8 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb, /* z24s8 depthbuffer functions. */ #define INTEL_VALUE_TYPE GLuint -#define INTEL_WRITE_DEPTH(offset, d) pwrite_32(irb, offset, z24s8_to_s8z24(d)) -#define INTEL_READ_DEPTH(offset) s8z24_to_z24s8(pread_32(irb, offset)) +#define INTEL_WRITE_DEPTH(offset, d) pwrite_32(irb, offset, d) +#define INTEL_READ_DEPTH(offset) pread_32(irb, offset) #define INTEL_TAG(name) name##_z24_s8 #include "intel_depthtmp.h" @@ -665,13 +653,13 @@ intel_set_span_functions(struct intel_context *intel, break; } break; - case MESA_FORMAT_Z24_S8: + case MESA_FORMAT_S8_Z24: /* There are a few different ways SW asks us to access the S8Z24 data: * Z24 depth-only depth reads * S8Z24 depth reads * S8Z24 stencil reads. */ - if (rb->Format == MESA_FORMAT_Z24_S8) { + if (rb->Format == MESA_FORMAT_S8_Z24) { switch (tiling) { case I915_TILING_NONE: default: diff --git a/src/mesa/drivers/dri/intel/intel_tex_format.c b/src/mesa/drivers/dri/intel/intel_tex_format.c index a71590d3ef1..eca0f6d5723 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_format.c +++ b/src/mesa/drivers/dri/intel/intel_tex_format.c @@ -153,7 +153,7 @@ intelChooseTextureFormat(GLcontext * ctx, GLint internalFormat, #endif case GL_DEPTH_STENCIL_EXT: case GL_DEPTH24_STENCIL8_EXT: - return MESA_FORMAT_Z24_S8; + return MESA_FORMAT_S8_Z24; #ifndef I915 case GL_SRGB_EXT: -- 2.30.2