From 6903cb54375f3ebcd34916f49403e3330115644e Mon Sep 17 00:00:00 2001 From: Shriya Sharma Date: Mon, 25 Sep 2023 18:36:48 +0100 Subject: [PATCH] Added english language description, spaces and brackets for lhaux instruction --- openpower/isa/fixedload.mdwn | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/openpower/isa/fixedload.mdwn b/openpower/isa/fixedload.mdwn index 7dd4bd0c..7055c23f 100644 --- a/openpower/isa/fixedload.mdwn +++ b/openpower/isa/fixedload.mdwn @@ -271,6 +271,17 @@ Pseudo-code: RT <- EXTS(MEM(EA, 2)) RA <- EA +Description: + + Let the effective address (EA) be the sum (RA)+ (RB). + The halfword in storage addressed by EA is loaded into + RT48:63. RT 0:47 are filled with a copy of bit 0 of the + loaded halfword. + + EA is placed into register RA. + + If RA=0 or RA=RT, the instruction form is invalid. + Special Registers Altered: None -- 2.30.2