From 6916e41948e31c6c7b89550db108bcce4df74c3a Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Fri, 9 Nov 2018 12:03:42 +0000 Subject: [PATCH] mulh 32-bit elwidth --- riscv/sv_insn_redirect.cc | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/riscv/sv_insn_redirect.cc b/riscv/sv_insn_redirect.cc index c1f2f7b..7d5a274 100644 --- a/riscv/sv_insn_redirect.cc +++ b/riscv/sv_insn_redirect.cc @@ -569,7 +569,21 @@ sv_sreg_t sv_proc_t::rv_mulhsu(sv_sreg_t const & lhs, sv_reg_t const & rhs) sv_sreg_t sv_proc_t::rv_mulh(sv_sreg_t const & lhs, sv_sreg_t const & rhs) { - return rv_mul(lhs, rhs) >> 32; + uint8_t bitwidth = _insn->src_bitwidth; + int64_t vlhs = 0; + int64_t vrhs = 0; + if (rv_int_op_prepare(lhs, rhs, vlhs, vrhs, bitwidth)) { + sv_sreg_t result = (lhs * rhs) >> 32; + fprintf(stderr, "mulh result %lx %lx %lx\n", + (int64_t)lhs, (int64_t)rhs, (int64_t)result); + return result; + } + uint8_t bw32 = std::min(bitwidth, (uint8_t)32); + int64_t result = (vlhs * vrhs) >> bw32; + result = sext_bwid(result, bw32); + fprintf(stderr, "mulh result %lx %lx %lx bw %d\n", + (int64_t)lhs, (int64_t)rhs, (int64_t)(result), bitwidth); + return rv_int_op_finish(lhs, rhs, result, bitwidth); } /* 64-bit mulh/mulhu/mulhsu */ -- 2.30.2