From 691b4ee3bf785079fe48c4b5261a0ebd906766cf Mon Sep 17 00:00:00 2001 From: Dmitry Selyutin Date: Tue, 11 Apr 2023 21:27:26 +0300 Subject: [PATCH] ppc/svp64: share SVP64 context via libopcodes --- gas/config/tc-ppc-svp64.c | 40 -------------------------------------- include/opcode/ppc-svp64.h | 40 ++++++++++++++++++++++++++++++++++++++ opcodes/ppc-svp64-dis.c | 2 +- 3 files changed, 41 insertions(+), 41 deletions(-) diff --git a/gas/config/tc-ppc-svp64.c b/gas/config/tc-ppc-svp64.c index fe79618d887..478338a224c 100644 --- a/gas/config/tc-ppc-svp64.c +++ b/gas/config/tc-ppc-svp64.c @@ -21,46 +21,6 @@ #include -struct svp64_ctx { - const char *name; - const struct svp64_desc *desc; - struct svp64_insn insn; - unsigned int sv_mode_explicit : 1; - unsigned int sv_mode : 2; - unsigned int mode : 5; - unsigned int pmmode : 1; - unsigned int pmask : 3; - unsigned int smmode : 1; - unsigned int smask : 3; - unsigned int mmode : 1; - unsigned int has_pmask : 1; - unsigned int has_smask : 1; - unsigned int mask_m_specified : 1; - unsigned int subvl : 2; - unsigned int destwid : 2; - unsigned int srcwid : 2; - unsigned int els : 1; - unsigned int sea : 1; - unsigned int sat : 1; - unsigned int dz : 1; - unsigned int sz : 1; - unsigned int ff : 3 + 2; /* 3-bit plus RC1 */ - unsigned int mr : 1; - unsigned int RG : 1; - unsigned int crm : 1; - unsigned int bc_all : 1; - unsigned int bc_lru : 1; - unsigned int bc_brc : 1; - unsigned int bc_svstep : 1; - unsigned int bc_vsb : 1; - unsigned int bc_vlset : 1; - unsigned int bc_vli : 1; - unsigned int bc_snz : 1; -}; - -#define SVP64_RC1_ACTIVE (1U << 3U) -#define SVP64_RC1_INVERT (SVP64_RC1_ACTIVE | (1U << 4U)) - enum svp64_predicate { /* Integer */ SVP64_PREDICATE_1BIT_R3, diff --git a/include/opcode/ppc-svp64.h b/include/opcode/ppc-svp64.h index 87cac813436..e90d38bfbf6 100644 --- a/include/opcode/ppc-svp64.h +++ b/include/opcode/ppc-svp64.h @@ -37,6 +37,46 @@ struct svp64_extra_desc { const struct svp64_extra_desc * svp64_extra_desc (const struct svp64_desc *desc, ppc_opindex_t opindex); +struct svp64_ctx { + const char *name; + const struct svp64_desc *desc; + struct svp64_insn insn; + unsigned int sv_mode_explicit : 1; + unsigned int sv_mode : 2; + unsigned int mode : 5; + unsigned int pmmode : 1; + unsigned int pmask : 3; + unsigned int smmode : 1; + unsigned int smask : 3; + unsigned int mmode : 1; + unsigned int has_pmask : 1; + unsigned int has_smask : 1; + unsigned int mask_m_specified : 1; + unsigned int subvl : 2; + unsigned int destwid : 2; + unsigned int srcwid : 2; + unsigned int els : 1; + unsigned int sea : 1; + unsigned int sat : 1; + unsigned int dz : 1; + unsigned int sz : 1; + unsigned int ff : 3 + 2; /* 3-bit plus RC1 */ + unsigned int mr : 1; + unsigned int RG : 1; + unsigned int crm : 1; + unsigned int bc_all : 1; + unsigned int bc_lru : 1; + unsigned int bc_brc : 1; + unsigned int bc_svstep : 1; + unsigned int bc_vsb : 1; + unsigned int bc_vlset : 1; + unsigned int bc_vli : 1; + unsigned int bc_snz : 1; +}; + +#define SVP64_RC1_ACTIVE (1U << 3U) +#define SVP64_RC1_INVERT (SVP64_RC1_ACTIVE | (1U << 4U)) + #ifdef __cplusplus } #endif diff --git a/opcodes/ppc-svp64-dis.c b/opcodes/ppc-svp64-dis.c index 0d50997b1d9..c6bda0a84b3 100644 --- a/opcodes/ppc-svp64-dis.c +++ b/opcodes/ppc-svp64-dis.c @@ -94,7 +94,7 @@ svp64_lookup (uint64_t insn, ppc_cpu_t dialect) const struct svp64_record *record_end; struct svp64_insn svp64_insn = {insn}; - if ((svp64_insn_get_prefix_po (&svp64_insn) != 0x1) || + if ((svp64_insn_get_prefix_PO (&svp64_insn) != 0x1) || (svp64_insn_get_prefix_id (&svp64_insn) != 0x3)) return NULL; -- 2.30.2