From 692e031294569fc76371c9eda58f01cce1716c22 Mon Sep 17 00:00:00 2001 From: Trevor Saunders Date: Fri, 22 May 2015 01:04:17 +0000 Subject: [PATCH] remove #if HAVE_conditional_move gcc/ChangeLog: 2015-05-20 Trevor Saunders * combine.c, expmed.c, expr.c, optabs.c optabs.h, toplev.c: DOn't check HAVE_conditional_move with the preprocessor. From-SVN: r223518 --- gcc/ChangeLog | 5 +++++ gcc/combine.c | 5 ++--- gcc/expmed.c | 13 +++++-------- gcc/expr.c | 10 ++-------- gcc/optabs.c | 30 ++++++++++++------------------ gcc/optabs.h | 2 -- gcc/toplev.c | 11 ++++++----- 7 files changed, 32 insertions(+), 44 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ac1933a0a9a..eea5da58d8b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2015-05-20 Trevor Saunders + + * combine.c, expmed.c, expr.c, optabs.c optabs.h, toplev.c: DOn't + check HAVE_conditional_move with the preprocessor. + 2015-05-20 Trevor Saunders * genconfig.c (main): Always define HAVE_conditional_move. diff --git a/gcc/combine.c b/gcc/combine.c index 3f96bbca4bf..4a57557fe8c 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -6818,9 +6818,8 @@ simplify_set (rtx x) && (GET_CODE (XEXP (src, 0)) == EQ || GET_CODE (XEXP (src, 0)) == NE) && XEXP (XEXP (src, 0), 1) == const0_rtx && GET_MODE (src) == GET_MODE (XEXP (XEXP (src, 0), 0)) -#if HAVE_conditional_move - && ! can_conditionally_move_p (GET_MODE (src)) -#endif + && (!HAVE_conditional_move + || ! can_conditionally_move_p (GET_MODE (src))) && (num_sign_bit_copies (XEXP (XEXP (src, 0), 0), GET_MODE (XEXP (XEXP (src, 0), 0))) == GET_MODE_PRECISION (GET_MODE (XEXP (XEXP (src, 0), 0)))) diff --git a/gcc/expmed.c b/gcc/expmed.c index 589a7a3d0e5..fa13f8ced3f 100644 --- a/gcc/expmed.c +++ b/gcc/expmed.c @@ -3797,9 +3797,8 @@ expand_sdiv_pow2 (machine_mode mode, rtx op0, HOST_WIDE_INT d) return expand_shift (RSHIFT_EXPR, mode, temp, logd, NULL_RTX, 0); } -#if HAVE_conditional_move - if (BRANCH_COST (optimize_insn_for_speed_p (), false) - >= 2) + if (HAVE_conditional_move + && BRANCH_COST (optimize_insn_for_speed_p (), false) >= 2) { rtx temp2; @@ -3821,7 +3820,6 @@ expand_sdiv_pow2 (machine_mode mode, rtx op0, HOST_WIDE_INT d) } end_sequence (); } -#endif if (BRANCH_COST (optimize_insn_for_speed_p (), false) >= 2) @@ -5555,7 +5553,9 @@ emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1, target_mode); } -#if HAVE_conditional_move + if (!HAVE_conditional_move) + return 0; + /* Try using a setcc instruction for ORDERED/UNORDERED, followed by a conditional move. */ tem = emit_store_flag_1 (subtarget, first_code, op0, op1, mode, 0, @@ -5573,9 +5573,6 @@ emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1, if (tem == 0) delete_insns_since (last); return tem; -#else - return 0; -#endif } /* The remaining tricks only apply to integer comparisons. */ diff --git a/gcc/expr.c b/gcc/expr.c index efbf9fb9149..3605e994289 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -2423,7 +2423,6 @@ get_def_for_expr (tree name, enum tree_code code) return def_stmt; } -#if HAVE_conditional_move /* Return the defining gimple statement for SSA_NAME NAME if it is an assigment and the class of the expresion on the RHS is CLASS. Return NULL otherwise. */ @@ -2443,7 +2442,6 @@ get_def_for_expr_class (tree name, enum tree_code_class tclass) return def_stmt; } -#endif /* Determine whether the LEN bytes generated by CONSTFUN can be @@ -7517,7 +7515,6 @@ highest_pow2_factor_for_target (const_tree target, const_tree exp) return MAX (factor, talign); } -#if HAVE_conditional_move /* Convert the tree comparison code TCODE to the rtl one where the signedness is UNSIGNEDP. */ @@ -7575,7 +7572,6 @@ convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp) } return code; } -#endif /* Subroutine of expand_expr. Expand the two operands of a binary expression EXP0 and EXP1 placing the results in OP0 and OP1. @@ -8021,7 +8017,6 @@ expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED, tree treeop1 ATTRIBUTE_UNUSED, tree treeop2 ATTRIBUTE_UNUSED) { -#if HAVE_conditional_move rtx insn; rtx op00, op01, op1, op2; enum rtx_code comparison_code; @@ -8105,7 +8100,6 @@ expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED, /* Otherwise discard the sequence and fall back to code with branches. */ end_sequence (); -#endif return NULL_RTX; } @@ -8892,7 +8886,7 @@ expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode, if (code == MIN_EXPR) comparison_code = LT; } -#if HAVE_conditional_move + /* Use a conditional move if possible. */ if (can_conditionally_move_p (mode)) { @@ -8920,7 +8914,7 @@ expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode, branches. */ end_sequence (); } -#endif + if (target != op0) emit_move_insn (target, op0); diff --git a/gcc/optabs.c b/gcc/optabs.c index 7a791489c71..21150db1b29 100644 --- a/gcc/optabs.c +++ b/gcc/optabs.c @@ -929,7 +929,6 @@ expand_subword_shift (machine_mode op1_mode, optab binoptab, } -#if HAVE_conditional_move /* Try implementing expand_doubleword_shift using conditional moves. The shift is by < BITS_PER_WORD if (CMP_CODE CMP1 CMP2) is true, otherwise it is by >= BITS_PER_WORD. SUBWORD_OP1 and SUPERWORD_OP1 @@ -989,7 +988,6 @@ expand_doubleword_shift_condmove (machine_mode op1_mode, optab binoptab, return true; } -#endif /* Expand a doubleword shift (ashl, ashr or lshr) using word-mode shifts. OUTOF_INPUT and INTO_INPUT are the two word-sized halves of the first @@ -1096,20 +1094,19 @@ expand_doubleword_shift (machine_mode op1_mode, optab binoptab, unsignedp, methods, shift_mask); } -#if HAVE_conditional_move /* Try using conditional moves to generate straight-line code. */ - { - rtx_insn *start = get_last_insn (); - if (expand_doubleword_shift_condmove (op1_mode, binoptab, - cmp_code, cmp1, cmp2, - outof_input, into_input, - op1, superword_op1, - outof_target, into_target, - unsignedp, methods, shift_mask)) - return true; - delete_insns_since (start); - } -#endif + if (HAVE_conditional_move) + { + rtx_insn *start = get_last_insn (); + if (expand_doubleword_shift_condmove (op1_mode, binoptab, + cmp_code, cmp1, cmp2, + outof_input, into_input, + op1, superword_op1, + outof_target, into_target, + unsignedp, methods, shift_mask)) + return true; + delete_insns_since (start); + } /* As a last resort, use branches to select the correct alternative. */ rtx_code_label *subword_label = gen_label_rtx (); @@ -4518,7 +4515,6 @@ emit_indirect_jump (rtx loc ATTRIBUTE_UNUSED) #endif } -#if HAVE_conditional_move /* Emit a conditional move instruction if the machine supports one for that condition and machine mode. @@ -4636,8 +4632,6 @@ can_conditionally_move_p (machine_mode mode) return 0; } -#endif /* HAVE_conditional_move */ - /* Emit a conditional addition instruction if the machine supports one for that condition and machine mode. diff --git a/gcc/optabs.h b/gcc/optabs.h index ff45eb86993..8bff2f964b2 100644 --- a/gcc/optabs.h +++ b/gcc/optabs.h @@ -364,7 +364,6 @@ extern void emit_indirect_jump (rtx); #error "insn-config.h must be included before optabs.h" #endif -#if HAVE_conditional_move /* Emit a conditional move operation. */ rtx emit_conditional_move (rtx, enum rtx_code, rtx, rtx, machine_mode, rtx, rtx, machine_mode, int); @@ -372,7 +371,6 @@ rtx emit_conditional_move (rtx, enum rtx_code, rtx, rtx, machine_mode, /* Return nonzero if the conditional move is supported. */ int can_conditionally_move_p (machine_mode mode); -#endif rtx emit_conditional_add (rtx, enum rtx_code, rtx, rtx, machine_mode, rtx, rtx, machine_mode, int); diff --git a/gcc/toplev.c b/gcc/toplev.c index 9be15d784e4..18a725a779f 100644 --- a/gcc/toplev.c +++ b/gcc/toplev.c @@ -1576,11 +1576,12 @@ process_options (void) warning (0, "var-tracking-assignments changes selective scheduling"); if (flag_tree_cselim == AUTODETECT_VALUE) -#if HAVE_conditional_move - flag_tree_cselim = 1; -#else - flag_tree_cselim = 0; -#endif + { + if (HAVE_conditional_move) + flag_tree_cselim = 1; + else + flag_tree_cselim = 0; + } /* If auxiliary info generation is desired, open the output file. This goes in the same directory as the source file--unlike -- 2.30.2