From 6998b929fa954dc791b77011ce7d3252d6f107fe Mon Sep 17 00:00:00 2001 From: Vladimir Makarov Date: Tue, 21 Jul 2015 19:54:23 +0000 Subject: [PATCH] re PR ipa/66424 (wrong code at -O2 and -O3 on x86_64-linux-gnu in 32-bit mode) 2015-07-21 Vladimir Makarov PR ipa/66424. * lra-remat.c (operand_to_remat): Prevent using insns with input subregs processed separately by IRA. 2015-07-21 Vladimir Makarov PR ipa/66424. * gcc.target/i386/pr66424.c: New. From-SVN: r226053 --- gcc/ChangeLog | 6 +++ gcc/lra-remat.c | 10 +++++ gcc/testsuite/ChangeLog | 5 +++ gcc/testsuite/gcc.target/i386/pr66424.c | 51 +++++++++++++++++++++++++ 4 files changed, 72 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/pr66424.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 240cbefe500..63726155ccb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2015-07-21 Vladimir Makarov + + PR ipa/66424. + * lra-remat.c (operand_to_remat): Prevent using insns with input + subregs processed separately by IRA. + 2015-07-21 Andrew MacLeod * ssa-iterators.h (has_zero_uses, has_single_use): Implement as diff --git a/gcc/lra-remat.c b/gcc/lra-remat.c index 1c259a3b766..66532b8f464 100644 --- a/gcc/lra-remat.c +++ b/gcc/lra-remat.c @@ -417,6 +417,16 @@ operand_to_remat (rtx_insn *insn) return -1; found_reg = reg; } + /* IRA calculates conflicts separately for subregs of two words + pseudo. Even if the pseudo lives, e.g. one its subreg can be + used lately, another subreg hard register can be already used + for something else. In such case, it is not safe to + rematerialize the insn. */ + else if (reg->type == OP_IN && reg->subreg_p + && reg->regno >= FIRST_PSEUDO_REGISTER + && (GET_MODE_SIZE (PSEUDO_REGNO_MODE (reg->regno)) + == 2 * UNITS_PER_WORD)) + return -1; if (found_reg == NULL) return -1; if (found_reg->regno < FIRST_PSEUDO_REGISTER) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 35c7758960b..16d1caf0638 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-07-21 Vladimir Makarov + + PR ipa/66424. + * gcc.target/i386/pr66424.c: New. + 2015-07-21 Alex Velenko * gcc.target/arm/thumb-bitfld1.c (foo): Add explicit return type. diff --git a/gcc/testsuite/gcc.target/i386/pr66424.c b/gcc/testsuite/gcc.target/i386/pr66424.c new file mode 100644 index 00000000000..f5f5e1e8b5c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr66424.c @@ -0,0 +1,51 @@ +/* { dg-do run } */ +/* { dg-options "-O2" } */ +/* { dg-require-effective-target ia32 } */ +int a, b, c, d, e[2], f, l, m, n, o; +long long g = 1, j; +static unsigned int h; +static int i, k; + +void +fn1 (long long p) +{ + int q = p; + f = 1 ^ e[f ^ (q & 1)]; +} + +static void +fn2 (long long p) +{ + f = 1 ^ e[(f ^ 1) & 1]; + fn1 (p >> 1 & 1); + fn1 (p >> 32 & 1); +} + +void +fn3 (int p) +{ + g |= j = p; +} + +int +main () +{ + e[0] = 1; + char p = l; + h = --g; + i = o = c; + m = d ? 1 / d : 0; + fn3 (l || 0); + b = a; + n = j++; + k--; + fn2 (g); + fn2 (h); + fn2 (i); + + if (k + f) + __builtin_abort (); + + return 0; +} + -- 2.30.2