From 69f4a6dc86b179a3c27121bb2704b3be9d9d4596 Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Tue, 24 Jul 2007 15:10:53 -0700
Subject: [PATCH] Make the shift and rotate microops mask the shift/rotate
 amount correctly.

--HG--
extra : convert_revision : 31c5d3fa8ef0d37494d0e35cef31be6056d5d93f
---
 src/arch/x86/isa/microops/regop.isa | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index dbbe11c90..c3f008993 100644
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -466,11 +466,11 @@ let {{
 
     # Shift instructions
     defineMicroRegOp('Sll', '''
-            uint8_t shiftAmt = (op2 & ((dataSize == 8) ? mask(4) : mask(3)));
+            uint8_t shiftAmt = (op2 & ((dataSize == 8) ? mask(6) : mask(5)));
             DestReg = merge(DestReg, SrcReg1 << shiftAmt, dataSize);
             ''')
     defineMicroRegOp('Srl', '''
-            uint8_t shiftAmt = (op2 & ((dataSize == 8) ? mask(4) : mask(3)));
+            uint8_t shiftAmt = (op2 & ((dataSize == 8) ? mask(6) : mask(5)));
             // Because what happens to the bits shift -in- on a right shift
             // is not defined in the C/C++ standard, we have to mask them out
             // to be sure they're zero.
@@ -478,7 +478,7 @@ let {{
             DestReg = merge(DestReg, (SrcReg1 >> shiftAmt) & logicalMask, dataSize);
             ''')
     defineMicroRegOp('Sra', '''
-            uint8_t shiftAmt = (op2 & ((dataSize == 8) ? mask(4) : mask(3)));
+            uint8_t shiftAmt = (op2 & ((dataSize == 8) ? mask(6) : mask(5)));
             // Because what happens to the bits shift -in- on a right shift
             // is not defined in the C/C++ standard, we have to sign extend
             // them manually to be sure.
@@ -488,7 +488,7 @@ let {{
             ''')
     defineMicroRegOp('Ror', '''
             uint8_t shiftAmt =
-                (op2 & ((dataSize == 8) ? mask(4) : mask(3)));
+                (op2 & ((dataSize == 8) ? mask(6) : mask(5)));
             if(shiftAmt)
             {
                 uint64_t top = SrcReg1 << (dataSize * 8 - shiftAmt);
@@ -500,7 +500,7 @@ let {{
             ''')
     defineMicroRegOp('Rcr', '''
             uint8_t shiftAmt =
-                (op2 & ((dataSize == 8) ? mask(4) : mask(3)));
+                (op2 & ((dataSize == 8) ? mask(6) : mask(5)));
             if(shiftAmt)
             {
                 CCFlagBits flags = ccFlagBits;
@@ -515,7 +515,7 @@ let {{
             ''')
     defineMicroRegOp('Rol', '''
             uint8_t shiftAmt =
-                (op2 & ((dataSize == 8) ? mask(4) : mask(3)));
+                (op2 & ((dataSize == 8) ? mask(6) : mask(5)));
             if(shiftAmt)
             {
                 uint64_t top = SrcReg1 << shiftAmt;
@@ -528,7 +528,7 @@ let {{
             ''')
     defineMicroRegOp('Rcl', '''
             uint8_t shiftAmt =
-                (op2 & ((dataSize == 8) ? mask(4) : mask(3)));
+                (op2 & ((dataSize == 8) ? mask(6) : mask(5)));
             if(shiftAmt)
             {
                 CCFlagBits flags = ccFlagBits;
-- 
2.30.2