From 6a2961d81b532d2a69c9b7c10eae1d617cd0e3d4 Mon Sep 17 00:00:00 2001 From: Adrian Herrera Date: Fri, 8 Nov 2019 11:12:24 +0000 Subject: [PATCH] arch-arm: fix routeToHyp for AArch64 in faults This patch fixes several bugs in Fault classes "routeToHyp" member function by which mode checking was not taking into account AArch64 execution state. For the particular case of SVC calls from NS EL0, this prevented a correct routing to EL2 when HCR_EL2.TGE was set. Change-Id: I5815fe6dcf4501f52bf92f61687ef6d6ef950e52 Reviewed-by: Giacomo Travaglini Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22725 Maintainer: Giacomo Travaglini Tested-by: kokoro Reviewed-by: Ciro Santilli --- src/arch/arm/faults.cc | 32 ++++++++++++++------------------ 1 file changed, 14 insertions(+), 18 deletions(-) diff --git a/src/arch/arm/faults.cc b/src/arch/arm/faults.cc index dbad5bf66..85e9fa7e9 100644 --- a/src/arch/arm/faults.cc +++ b/src/arch/arm/faults.cc @@ -800,9 +800,9 @@ UndefinedInstruction::routeToHyp(ThreadContext *tc) const CPSR cpsr = tc->readMiscRegNoEffect(MISCREG_CPSR); // if in Hyp mode then stay in Hyp mode - toHyp = scr.ns && (cpsr.mode == MODE_HYP); + toHyp = scr.ns && (currEL(tc) == EL2); // if HCR.TGE is set to 1, take to Hyp mode through Hyp Trap vector - toHyp |= !inSecureState(scr, cpsr) && hcr.tge && (cpsr.mode == MODE_USER); + toHyp |= !inSecureState(scr, cpsr) && hcr.tge && (currEL(tc) == EL0); return toHyp; } @@ -874,7 +874,7 @@ SupervisorCall::routeToHyp(ThreadContext *tc) const // if in Hyp mode then stay in Hyp mode toHyp = scr.ns && (cpsr.mode == MODE_HYP); // if HCR.TGE is set to 1, take to Hyp mode through Hyp Trap vector - toHyp |= !inSecureState(scr, cpsr) && hcr.tge && (cpsr.mode == MODE_USER); + toHyp |= !inSecureState(scr, cpsr) && hcr.tge && (currEL(tc) == EL0); return toHyp; } @@ -1283,16 +1283,15 @@ PrefetchAbort::routeToHyp(ThreadContext *tc) const SCR scr = tc->readMiscRegNoEffect(MISCREG_SCR); HCR hcr = tc->readMiscRegNoEffect(MISCREG_HCR); - CPSR cpsr = tc->readMiscRegNoEffect(MISCREG_CPSR); HDCR hdcr = tc->readMiscRegNoEffect(MISCREG_HDCR); // if in Hyp mode then stay in Hyp mode - toHyp = scr.ns && (cpsr.mode == MODE_HYP); + toHyp = scr.ns && (currEL(tc) == EL2); // otherwise, check whether to take to Hyp mode through Hyp Trap vector toHyp |= (stage2 || - ( (source == DebugEvent) && hdcr.tde && (cpsr.mode != MODE_HYP)) || - ( (source == SynchronousExternalAbort) && hcr.tge && (cpsr.mode == MODE_USER)) - ) && !inSecureState(tc); + ((source == DebugEvent) && hdcr.tde && (currEL(tc) != EL2)) || + ((source == SynchronousExternalAbort) && hcr.tge && + (currEL(tc) == EL0))) && !inSecureState(tc); return toHyp; } @@ -1344,21 +1343,18 @@ DataAbort::routeToHyp(ThreadContext *tc) const SCR scr = tc->readMiscRegNoEffect(MISCREG_SCR); HCR hcr = tc->readMiscRegNoEffect(MISCREG_HCR); - CPSR cpsr = tc->readMiscRegNoEffect(MISCREG_CPSR); HDCR hdcr = tc->readMiscRegNoEffect(MISCREG_HDCR); // if in Hyp mode then stay in Hyp mode - toHyp = scr.ns && (cpsr.mode == MODE_HYP); + toHyp = scr.ns && (currEL(tc) == EL2); // otherwise, check whether to take to Hyp mode through Hyp Trap vector toHyp |= (stage2 || - ( (cpsr.mode != MODE_HYP) && ( ((source == AsynchronousExternalAbort) && hcr.amo) || - ((source == DebugEvent) && hdcr.tde) ) - ) || - ( (cpsr.mode == MODE_USER) && hcr.tge && - ((source == AlignmentFault) || - (source == SynchronousExternalAbort)) - ) - ) && !inSecureState(tc); + ((currEL(tc) != EL2) && + (((source == AsynchronousExternalAbort) && hcr.amo) || + ((source == DebugEvent) && hdcr.tde))) || + ((currEL(tc) == EL0) && hcr.tge && + ((source == AlignmentFault) || + (source == SynchronousExternalAbort)))) && !inSecureState(tc); return toHyp; } -- 2.30.2