From 6a6c36e9776a5f1df2e84aead670b215712f4094 Mon Sep 17 00:00:00 2001 From: Caio Marcelo de Oliveira Filho Date: Wed, 29 Apr 2020 13:48:58 -0700 Subject: [PATCH] intel/fs: Use writes_memory from shader_info Reviewed-by: Kenneth Graunke Part-of: --- src/intel/compiler/brw_fs.cpp | 3 +++ src/intel/compiler/brw_fs_nir.cpp | 25 ------------------------- 2 files changed, 3 insertions(+), 25 deletions(-) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 089fb15a48e..62025406d1c 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -8306,6 +8306,9 @@ fs_visitor::run_fs(bool allow_spilling, bool do_rep_send) } } + if (nir->info.writes_memory) + wm_prog_data->has_side_effects = true; + emit_nir_code(); if (failed) diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 7b316b62f8a..f7224d48bfc 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -4090,10 +4090,6 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr case nir_intrinsic_bindless_image_atomic_xor: case nir_intrinsic_bindless_image_atomic_exchange: case nir_intrinsic_bindless_image_atomic_comp_swap: { - if (stage == MESA_SHADER_FRAGMENT && - instr->intrinsic != nir_intrinsic_image_load) - brw_wm_prog_data(prog_data)->has_side_effects = true; - /* Get some metadata from the image intrinsic. */ const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; @@ -4227,9 +4223,6 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr } case nir_intrinsic_image_store_raw_intel: { - if (stage == MESA_SHADER_FRAGMENT) - brw_wm_prog_data(prog_data)->has_side_effects = true; - fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS]; srcs[SURFACE_LOGICAL_SRC_SURFACE] = get_nir_image_intrinsic_image(bld, instr); @@ -4594,9 +4587,6 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr case nir_intrinsic_store_global: assert(devinfo->gen >= 8); - if (stage == MESA_SHADER_FRAGMENT) - brw_wm_prog_data(prog_data)->has_side_effects = true; - assert(nir_src_bit_size(instr->src[0]) <= 32); assert(nir_intrinsic_write_mask(instr) == (1u << instr->num_components) - 1); @@ -4681,9 +4671,6 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr case nir_intrinsic_store_ssbo: { assert(devinfo->gen >= 7); - if (stage == MESA_SHADER_FRAGMENT) - brw_wm_prog_data(prog_data)->has_side_effects = true; - const unsigned bit_size = nir_src_bit_size(instr->src[0]); fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS]; srcs[SURFACE_LOGICAL_SRC_SURFACE] = @@ -5305,9 +5292,6 @@ void fs_visitor::nir_emit_ssbo_atomic(const fs_builder &bld, int op, nir_intrinsic_instr *instr) { - if (stage == MESA_SHADER_FRAGMENT) - brw_wm_prog_data(prog_data)->has_side_effects = true; - /* The BTI untyped atomic messages only support 32-bit atomics. If you * just look at the big table of messages in the Vol 7 of the SKL PRM, they * appear to exist. However, if you look at Vol 2a, there are no message @@ -5347,9 +5331,6 @@ void fs_visitor::nir_emit_ssbo_atomic_float(const fs_builder &bld, int op, nir_intrinsic_instr *instr) { - if (stage == MESA_SHADER_FRAGMENT) - brw_wm_prog_data(prog_data)->has_side_effects = true; - fs_reg dest; if (nir_intrinsic_infos[instr->intrinsic].has_dest) dest = get_nir_dest(instr->dest); @@ -5459,9 +5440,6 @@ void fs_visitor::nir_emit_global_atomic(const fs_builder &bld, int op, nir_intrinsic_instr *instr) { - if (stage == MESA_SHADER_FRAGMENT) - brw_wm_prog_data(prog_data)->has_side_effects = true; - fs_reg dest; if (nir_intrinsic_infos[instr->intrinsic].has_dest) dest = get_nir_dest(instr->dest); @@ -5493,9 +5471,6 @@ void fs_visitor::nir_emit_global_atomic_float(const fs_builder &bld, int op, nir_intrinsic_instr *instr) { - if (stage == MESA_SHADER_FRAGMENT) - brw_wm_prog_data(prog_data)->has_side_effects = true; - assert(nir_intrinsic_infos[instr->intrinsic].has_dest); fs_reg dest = get_nir_dest(instr->dest); -- 2.30.2