From 6ab7853a47a807278c1dc6f65bae06e2a364d4f3 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 23 Jul 2019 17:30:01 +0100 Subject: [PATCH] remove debug prints --- src/ieee754/div_rem_sqrt_rsqrt/div_pipe.py | 4 ++-- src/ieee754/fpcommon/normtopack.py | 2 +- src/ieee754/fpcommon/test/fpmux.py | 2 ++ src/ieee754/fpdiv/test/test_fpsqrt_pipe.py | 6 +++--- 4 files changed, 8 insertions(+), 6 deletions(-) diff --git a/src/ieee754/div_rem_sqrt_rsqrt/div_pipe.py b/src/ieee754/div_rem_sqrt_rsqrt/div_pipe.py index 899f4f5e..438fc619 100644 --- a/src/ieee754/div_rem_sqrt_rsqrt/div_pipe.py +++ b/src/ieee754/div_rem_sqrt_rsqrt/div_pipe.py @@ -89,7 +89,7 @@ class DivPipeInterstageData(DivPipeCoreInterstageData, DivPipeBaseData): def eq(self, rhs): """ Assign member signals. """ - print (self, rhs) + #print (self, rhs) return DivPipeCoreInterstageData.eq(self, rhs) + \ DivPipeBaseData.eq(self, rhs) @@ -127,7 +127,7 @@ class DivPipeSetupStage(DivPipeBaseStage, DivPipeCoreSetupStage): def __init__(self, pspec): self.pspec = pspec - print ("DivPipeSetupStage", pspec, pspec.core_config) + #print ("DivPipeSetupStage", pspec, pspec.core_config) DivPipeCoreSetupStage.__init__(self, pspec.core_config) def ispec(self): diff --git a/src/ieee754/fpcommon/normtopack.py b/src/ieee754/fpcommon/normtopack.py index c78c1e95..b90d0232 100644 --- a/src/ieee754/fpcommon/normtopack.py +++ b/src/ieee754/fpcommon/normtopack.py @@ -18,7 +18,7 @@ class FPNormToPack(FPState, SimpleHandshake): def __init__(self, pspec, e_extra=False): FPState.__init__(self, "normalise_1") - print ("normtopack", pspec) + #print ("normtopack", pspec) self.pspec = pspec self.e_extra = e_extra SimpleHandshake.__init__(self, self) # pipeline is its own stage diff --git a/src/ieee754/fpcommon/test/fpmux.py b/src/ieee754/fpcommon/test/fpmux.py index f4f72536..a01ea3c9 100644 --- a/src/ieee754/fpcommon/test/fpmux.py +++ b/src/ieee754/fpcommon/test/fpmux.py @@ -161,7 +161,9 @@ def create_random(num_rows, width, single_op=False, n_vals=10): #op1 = 0x1841 + # FSQRT #op1 = 0x3449f9a9 + #op1 = 0x1ba94baa vals.append((op1,)) else: diff --git a/src/ieee754/fpdiv/test/test_fpsqrt_pipe.py b/src/ieee754/fpdiv/test/test_fpsqrt_pipe.py index 84cd4dad..38b1f360 100644 --- a/src/ieee754/fpdiv/test/test_fpsqrt_pipe.py +++ b/src/ieee754/fpdiv/test/test_fpsqrt_pipe.py @@ -12,17 +12,17 @@ def sqrt(x): def test_pipe_sqrt_fp16(): dut = FPDIVMuxInOut(16, 4) runfp(dut, 16, "test_fpsqrt_pipe_fp16", Float16, sqrt, - single_op=True, opcode=1) + single_op=True, opcode=1, n_vals=100) def test_pipe_sqrt_fp32(): dut = FPDIVMuxInOut(32, 4) runfp(dut, 32, "test_fpsqrt_pipe_fp32", Float32, sqrt, - single_op=True, opcode=1) + single_op=True, opcode=1, n_vals=100) def test_pipe_sqrt_fp64(): dut = FPDIVMuxInOut(64, 4) runfp(dut, 64, "test_fpsqrt_pipe_fp64", Float64, sqrt, - single_op=True, opcode=1) + single_op=True, opcode=1, n_vals=100) if __name__ == '__main__': test_pipe_sqrt_fp16() -- 2.30.2