From 6b30391c59803ad16625d5f31986ca3849dc4d62 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 26 Dec 2020 15:26:56 +0000 Subject: [PATCH] --- openpower/sv/overview.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openpower/sv/overview.mdwn b/openpower/sv/overview.mdwn index 344675664..7a7011ccf 100644 --- a/openpower/sv/overview.mdwn +++ b/openpower/sv/overview.mdwn @@ -34,7 +34,7 @@ at the hardware level the microarchitecture may execute from one element right the way through to tens of thousands at a time, yet the executable remains exactly the same and the ISA remains clear, true to the RISC paradigm, and clean. Unlike in SIMD, powers of two limitations are not -involved in either the hardware or in the assembly code. +involved in the ISA or in the assembly code. SimpleV takes the Cray style Vector principle and applies it in the abstract to a Scalar ISA, in the process allowing register file size -- 2.30.2