From 6b7e8671878891adcbace3de22331689b85b2ce9 Mon Sep 17 00:00:00 2001 From: Kyrylo Tkachov Date: Fri, 2 Oct 2015 08:36:45 +0000 Subject: [PATCH] [RTL ifcvt] PR 67786, 67787: Check that intermediate instructions in the basic block don't clobber a reg used in condition PR rtl-optimization/67786 PR rtl-optimization/67787 * ifcvt.c (bb_valid_for_noce_process_p): Reject basic block if it modifies a reg used in the condition calculation. * gcc.dg/pr67786.c: New test. * gcc.dg/pr67787.c: Likewise. From-SVN: r228375 --- gcc/ChangeLog | 7 ++++++ gcc/ifcvt.c | 3 ++- gcc/testsuite/ChangeLog | 7 ++++++ gcc/testsuite/gcc.dg/pr67786.c | 20 ++++++++++++++++ gcc/testsuite/gcc.dg/pr67787.c | 43 ++++++++++++++++++++++++++++++++++ 5 files changed, 79 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.dg/pr67786.c create mode 100644 gcc/testsuite/gcc.dg/pr67787.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6eeb740e590..91c99729879 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2015-10-02 Kyrylo Tkachov + + PR rtl-optimization/67786 + PR rtl-optimization/67787 + * ifcvt.c (bb_valid_for_noce_process_p): Reject basic block if + it modifies a reg used in the condition calculation. + 2015-10-02 James Greenhalgh * config/aarch64/aarch64-simd.md (*aarch64_combinez): Add diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c index 7ab738ec0e2..d0ae4941556 100644 --- a/gcc/ifcvt.c +++ b/gcc/ifcvt.c @@ -3003,7 +3003,8 @@ bb_valid_for_noce_process_p (basic_block test_bb, rtx cond, gcc_assert (sset); if (contains_mem_rtx_p (SET_SRC (sset)) - || !REG_P (SET_DEST (sset))) + || !REG_P (SET_DEST (sset)) + || reg_overlap_mentioned_p (SET_DEST (sset), cond)) goto free_bitmap_and_fail; potential_cost += insn_rtx_cost (sset, speed_p); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 1028cf765ee..2d1f34ccce1 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2015-10-02 Kyrylo Tkachov + + PR rtl-optimization/67786 + PR rtl-optimization/67787 + * gcc.dg/pr67786.c: New test. + * gcc.dg/pr67787.c: Likewise. + 2015-10-02 James Greenhalgh * gcc.target/aarch64/vect_combine_zeroes_1.c: New. diff --git a/gcc/testsuite/gcc.dg/pr67786.c b/gcc/testsuite/gcc.dg/pr67786.c new file mode 100644 index 00000000000..76525e51d4d --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr67786.c @@ -0,0 +1,20 @@ +/* { dg-do run } */ +/* { dg-options "-O3" } */ + +int a, b = 10; +char c; + +int +main () +{ + char d; + int e = 5; + for (a = 0; a; a--) + e = 0; + c = (b & 15) ^ e; + d = c > e ? c : c << e; + __builtin_printf ("%d\n", d); + return 0; +} + +/* { dg-output "15" } */ diff --git a/gcc/testsuite/gcc.dg/pr67787.c b/gcc/testsuite/gcc.dg/pr67787.c new file mode 100644 index 00000000000..9d132488d45 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr67787.c @@ -0,0 +1,43 @@ +/* { dg-do run } */ +/* { dg-options "-O3" } */ + +int a, c, f, g; +char b; + +static int +fn1 () +{ + char h; + int k = -1, i, j; + for (; b < 16; b++) + ; + __builtin_printf (" "); + if (b < 5) + k++; + if (k) + { + int l = 2; + a = h = b < 0 || b > (127 >> l) ? b : b << 1; + return 0; + } + for (i = 0; i < 1; i++) + for (j = 0; j < 7; j++) + f = 0; + for (c = 0; c; c++) + ; + if (g) + for (;;) + ; + return 0; +} + +int +main () +{ + fn1 (); + + if (a != 32) + __builtin_abort (); + + return 0; +} -- 2.30.2